| Commit message (Collapse) | Author | Age | Files | Lines |
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...that are already handled in udp_zero_copy.
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we're no longer need this. Because there are default send buff size in
each transport type impl.
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This is used to determine send_buff_size and recv_buff_size
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Adding CMake flag to enable/disable NEON SIMD instructions. This is an
addition to the previous checks (check for NEON headers and checking
the size of pointers), so behavior is unchanged unless users specify
that they do not want to use NEON instructions.
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The gpio devtest passes after this fix. Enabling the test
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This library makes available a userspace network stack with a
socket-like interface for applications (except the sockets pass around
pointers to buffers and use the buffers directly--It's sockets + a
put/get for buffer management). Supported services are ARP and UDP.
Destinations can be unicast or broadcast. Multicast is not currently
supported.
The implementation has two driver layers. The upper layer runs within
the caller's context. The caller will make requests through lockless
ring buffers (including socket creation and packet transmission), and
the lower layer will implement the requests and provide a response.
Currently, the lower layer runs in a separate I/O thread, and the caller
will block until it receives a response.
The I/O thread's main body is in src/uhd_dpdk_driver.c. You'll find that
all I/O thread functions are prefixed by an underscore, and user thread
functions do not.
src/uhd_dpdk.c is used to initialize uhd-dpdk and bring up the network
interfaces.
src/uhd_dpdk_fops.c and src/uhd_dpdk_udp.c are for network services.
The test is a benchmark of a flow control loop using a certain made-up
protocol with credits and sequence number tracking.
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By default, Boost.ASIO uses 'address_configured' mode for UDP endpoint
resolution, which "only return[s] IPv4 addresses if a non-loopback
IPv4 address is configured for the system". This changes the resolver
to use 'all_matching', which instead returns "all matching IPv6 and
IPv4 addresses".
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Fixes #2484
When building uhd host as a static library on Windows, UHD_API is
defined as __declspec(dllimport). This results in MSVC returning error
C2491 during compilation. Added a preprocessor define UHD_STATIC_LIB
in cmake and made the config headers set UHD_API to empty string when
UHD_STATIC_LIB is defined.
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Now matches the FPGA error message (go download, then run
uhd_image_loader).
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Change the RB_FIFOSIZE register to store the FIFO size in bytes
instead of log2 of bytes.
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- AMP_LO1_EN_CH1 controls U2, the amp for the external LO1 port, so it must
be set high if channel 2 is using an external LO (external or reimport)
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This is a common message that will always occur during device init when
there is no RIO device available. Because it looks like an error, it
confuses people and was thus reduced to TRACE.
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The C/C++ standards don't define what time_t is, only that it is
arithmetic (and real for C11, and integral for C++). It should not be
used in portable software and is only used as the return value for some
libc calls.
A common definition for time_t is int64_t, so we'll switch to that
permanently in our own APIs. System APIs will of course stick with
time_t.
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For USRPs that support user settings (e.g., B2xx, N230), this will
return an object that will allow peeking and poking user-defined
settings registers.
Mock code example:
auto usrp = multi_usrp::make(...);
auto user_settings_iface = usrp->get_user_settings_iface();
user_settings_iface->poke32(0, 23);
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No functional changes. Cleanup only. A little less Boost.
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You can now change the time/clock source default through device args:
auto usrp = uhd::usrp::multi_usrp::make(
"type=x300,clock_source=external,time_source=external");
This also enables the use of config files for the clock/time source
implicitly.
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x300_impl will now use a constrained_device_args_t-derived object to
parse device args.
No API or functional changes.
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- Add default parser helper
- Allow _enforce_discrete() for str_arg
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Also puts all defaults into the uhd::usrp::x300 namespace.
This commit does some renaming and refactoring, but no functional
changes.
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- Change RX/TX min/max frequency according to AD9361 datasheet
- Fix set_atr_bits to change with rx/tx frequency and antenna independently
- Make AMP switching active high
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- The flushing mechanism now looks similar to that in noc_shell
- Make use of new flush bit in FIFO control register
- Restrict using the clear bit only after flushing to ensure no
partial packets are introduced in the stream. (clear immediately
empties out FIFOs)
- Changes are backwards compatible with older FPGAs
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Before, setting these properties in the prop tree would trigger an
exception.
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This device is the only one using it, and no one will ever use it going
forward.
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- This bug could cause LO to not lock properly after a set_frequency call
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This will broadcast on all interfaces concurrently, instead of serially.
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Ethernet buffering is now done so that most of the buffering is done in
the socket buffers and multiple frames are only used to support the
receive side offload of the socket I/O. Eliminates dropped packets at
high full duplex rates.
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send_buff_size is now constrained to input fifo size, and we increase
timeout on getting flow control to reduce CPU usage.
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This is to allow for num_recv_frames=1 and reduce conversions from ticks
to time_spec_t to improve critical path performance.
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This is to avoid underruns caused by flow control packets being blocked
by data packets at high rates.
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- UHD will now "disconnect" the noc_block data-path from
the crossbar when the block's dtor is invoked. This allows
long running or slow blocks to empty out rapidly during
teardown.
- UHD will also attempt to flush at init time in case a block
is destroyed abnormally. The goal of the flush mechanism is
to not lock up the FPGA
- noc_shell compat number is now 3
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