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* multi_usrp: Add get_user_settings_iface() API callMartin Braun2018-08-161-0/+12
| | | | | | | | | | | For USRPs that support user settings (e.g., B2xx, N230), this will return an object that will allow peeking and poking user-defined settings registers. Mock code example: auto usrp = multi_usrp::make(...); auto user_settings_iface = usrp->get_user_settings_iface(); user_settings_iface->poke32(0, 23);
* b200: Enable access to user regs via the 'enable_user_regs' argMartin Braun2018-08-163-4/+31
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* b200: Remove superfluous fake lambdaMartin Braun2018-08-161-11/+10
| | | | No functional changes. Cleanup only. A little less Boost.
* x300: Enable clock_source and time_source device argsMartin Braun2018-08-101-2/+2
| | | | | | | | | | You can now change the time/clock source default through device args: auto usrp = uhd::usrp::multi_usrp::make( "type=x300,clock_source=external,time_source=external"); This also enables the use of config files for the clock/time source implicitly.
* x300: Use constrained_argsMartin Braun2018-08-104-48/+222
| | | | | | | x300_impl will now use a constrained_device_args_t-derived object to parse device args. No API or functional changes.
* lib: Improve constrained_device_args_tMartin Braun2018-08-101-2/+14
| | | | | - Add default parser helper - Allow _enforce_discrete() for str_arg
* x300: Move defaults to their own headerMartin Braun2018-08-103-116/+159
| | | | | | | Also puts all defaults into the uhd::usrp::x300 namespace. This commit does some renaming and refactoring, but no functional changes.
* e320: Fix tx/rx atr - antenna and frequency settingsSugandha Gupta2018-08-095-30/+32
| | | | | | - Change RX/TX min/max frequency according to AD9361 datasheet - Fix set_atr_bits to change with rx/tx frequency and antenna independently - Make AMP switching active high
* fixup! mpm: mg: add set_master_clock_rate memberMartin Braun2018-08-031-2/+2
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* rfnoc: dma_fifo: Added a more robust flush mechanismAshish Chaudhari2018-08-032-36/+60
| | | | | | | | | - The flushing mechanism now looks similar to that in noc_shell - Make use of new flush bit in FIFO control register - Restrict using the clear bit only after flushing to ensure no partial packets are introduced in the stream. (clear immediately empties out FIFOs) - Changes are backwards compatible with older FPGAs
* mg: Allow calling set_rate() at runtimeMartin Braun2018-08-022-6/+38
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* mpm: mg: add set_master_clock_rate memberDaniel Jepson2018-08-022-0/+13
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* mpmd: Allow setting time_source and clock_source propsMartin Braun2018-08-021-24/+4
| | | | | Before, setting these properties in the prop tree would trigger an exception.
* x300: Log git hash and compat number as debug messageMartin Braun2018-08-011-3/+8
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* b100: Demote some clocking-related log messages to traceMartin Braun2018-07-311-2/+2
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* b100: Remove all Boostisms from fifo_ctrl_excelsiorMartin Braun2018-07-311-9/+9
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* b100: Fix fifo_ctrl_excelsior not exitingMartin Braun2018-07-311-13/+2
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* b100: Move fifo_ctrl_excelsior to b100 subdirMartin Braun2018-07-315-2/+2
| | | | | This device is the only one using it, and no one will ever use it going forward.
* lmx2592: fix calibration start during tuningMark Meserve2018-07-311-1/+3
| | | | - This bug could cause LO to not lock properly after a set_frequency call
* lmx2592: always mux lock detect after initMark Meserve2018-07-311-9/+5
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* lib: device: Parallelize device discoveryMartin Braun2018-07-311-11/+19
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* mpmd: Parallelize broadcast-findingMartin Braun2018-07-311-2/+11
| | | | This will broadcast on all interfaces concurrently, instead of serially.
* X300: Change Ethernet bufferingMichael West2018-07-2512-328/+339
| | | | | | | Ethernet buffering is now done so that most of the buffering is done in the socket buffers and multiple frames are only used to support the receive side offload of the socket I/O. Eliminates dropped packets at high full duplex rates.
* Device3: Constrain send_buff_sizeMichael West2018-07-251-6/+12
| | | | | send_buff_size is now constrained to input fifo size, and we increase timeout on getting flow control to reduce CPU usage.
* rx_streamer: Release buffers no longer neededMichael West2018-07-251-9/+26
| | | | | This is to allow for num_recv_frames=1 and reduce conversions from ticks to time_spec_t to improve critical path performance.
* X300: Reduce Ethernet frame size to 4000michael-west2018-07-252-6/+5
| | | | | This is to avoid underruns caused by flow control packets being blocked by data packets at high rates.
* Device3: Change packet-based flow control to byte-based flow controlMartin Braun2018-07-2515-443/+629
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* rfnoc: Enabled SW flush mechanism impl'd in noc_shellAshish Chaudhari2018-07-242-4/+88
| | | | | | | | | | | - UHD will now "disconnect" the noc_block data-path from the crossbar when the block's dtor is invoked. This allows long running or slow blocks to empty out rapidly during teardown. - UHD will also attempt to flush at init time in case a block is destroyed abnormally. The goal of the flush mechanism is to not lock up the FPGA - noc_shell compat number is now 3
* rfnoc: legacy_compat: Remove superfluous variableMartin Braun2018-07-231-1/+0
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* C API: Fix incorrectly declared lockMartin Braun2018-07-231-1/+1
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* n230: Fix incorrectly declared locksMartin Braun2018-07-231-3/+5
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* x300: Fix incorrectly declared locksMartin Braun2018-07-232-5/+5
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* mpmd: Add set_timeout_init() API call to mpmd_mboard_implMartin Braun2018-07-182-2/+11
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* fixup! uhd: Warn when tuning with auto DSP frequency and an external LOBrent Stapleton2018-07-181-1/+3
| | | | | | Check for ALL_LOS in the property tree before checking if its set to external. This warning is only applicable to the TwinRX, so its fine to only look for the ALL_LOS property.
* uhd: initial commit of UHD support for E320Brent Stapleton2018-07-1815-12/+1875
| | | | Co-authored-by: Sugandha Gupta <sugandha.gupta@ettus.com>
* mpm: initial commit of E320 codeBrent Stapleton2018-07-182-0/+21
| | | | Co-authored-by: Sugandha Gupta <sugandha.gupta@ettus.com>
* multi_usrp: Fix get_usrp_tx_info() for MPMD devicesMartin Braun2018-07-171-1/+1
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* UBX: Add support for phase synchronization at LTE clock ratesMichael West2018-07-173-13/+46
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* X300: Change default dboard_clock_rate depending on master_clock_rateMichael West2018-07-172-3/+3
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* X300: Add support for 11.52 MHz and 23.04 MHz referencesMichael West2018-07-171-12/+82
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* fixup! lib: Purge some use of boost::system_timeMartin Braun2018-07-171-1/+0
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* B200: Fix SC8 RX StreamingVidush2018-07-161-9/+18
| | | | | Coerces recv_frame_size to size of words (8 bytes) to prevent USB_TRANSFER_OVERFLOW error.
* mg: fix tx power issueTrung Tran2018-07-144-27/+4
| | | | | | This commit will fix power issues with 2 radios configuration (UHD 3.12+). Removed unused _master boolean. CPLD path are now correct, each radio has its own CPLD object.
* fixup! B200: Check if recv_frame_size is larger than minimum valuemichael-west2018-07-132-12/+20
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* b200: Update FW and FPGA imagesMartin Braun2018-07-121-2/+2
| | | | | FPGA compat number bumped to 15. This includes fixes to resolve the "lost EOB" issue on B2xx.
* B200: Check if recv_frame_size is larger than minimum valueVidush2018-07-122-0/+10
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* B200: Change Recv Frame Size to 8176Vidush2018-07-122-2/+20
| | | | | | | | The default frame size is set to 8176. If a frame size entered is a multiple of 512, the actual frame size is set to the next lowest multiple of 24. Both changes are made to ensure no packet gets stuck in the fx3.
* lib: Purge some use of boost::system_timeMartin Braun2018-07-125-21/+32
| | | | | These are all timeout loops, which now use std::chrono::steady_clock::now() to check for timeout events.
* uhd: Expose DC Offset range via multi_usrp interfaceDerek Kozel2018-07-114-0/+45
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* uhd: Warn when tuning with auto DSP frequency and an external LODerek Kozel2018-07-101-0/+19
| | | | | In LO sharing cases this can result in frequency errors between channels.
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