aboutsummaryrefslogtreecommitdiffstats
path: root/host/lib
Commit message (Collapse)AuthorAgeFilesLines
* dboard: updated timed sync stuff for wbx* sbx*Josh Blum2012-04-205-39/+53
|
* usrp2: cleanup for fifo control wraparound_lt16 routineJosh Blum2012-04-201-5/+3
|
* usrp2: add variable for wb/spi interfaceJosh Blum2012-04-202-12/+27
| | | | | This variable gets set based on the rev type so we can support the command fifo when present.
* usrp2: updated fifo command with to 16 (1 short fifo)Josh Blum2012-04-181-1/+1
|
* usrp: updated nchan usage for vita rx changeJosh Blum2012-04-101-1/+1
|
* Merge branch 'master' into nextJosh Blum2012-04-102-11/+55
|\
| * Merge branch 'maint'Josh Blum2012-04-092-6/+4
| |\
| | * dsp: clear register now overlaps with numchan register.Josh Blum2012-04-091-4/+2
| | | | | | | | | | | | This fixes the bug of unwanted clearing when setting format.
| | * usrp: fix set_clock_config typo for external and mimo clock refJosh Blum2012-04-061-2/+2
| | | | | | | | | | | | | | | | | | This is a typo in the set_clock_config implementation. However, the enum values are the same, so this would not cause a bug. Fixed although set_clock_config is a deprecated interface.
| * | multi_usrp: added subdev spec and antenna to get_usrp_info functionsNicholas Corgan2012-04-051-1/+1
| | |
| * | multi_usrp: added subdev spec and antenna to get_usrp_info functionsNicholas Corgan2012-04-051-1/+5
| | |
| * | lib: multi_usrp can now output motherboard and daughterboard data in a ↵Nicholas Corgan2012-04-041-5/+47
| | | | | | | | | | | | dictionary form
* | | Merge branch 'master' into nextJosh Blum2012-04-033-4/+10
|\| | | | | | | | | | | | | | Conflicts: host/examples/CMakeLists.txt
| * | Merge branch 'maint'Josh Blum2012-03-293-4/+10
| |\|
| | * usrp1: stop threads in deconstructorJosh Blum2012-03-293-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Its important to stop the threads before we let the other smart point objects naturally deconstruct to avoid thread-based race conditions. The attempt to deconstruct the tree and soft time ctrl had a bug because the tree had references in subtrees within the dboard manager class. Rather than continue to fix this method and deconstruct the tree to free up soft time ctrl, it seems simpler to just stop the thread in soft time ctrl, and then let it naturally deconstruct later by ref count.
* | | Merge branch 'master' into nextJosh Blum2012-03-263-19/+49
|\| |
| * | Merge branch 'maint'Josh Blum2012-03-262-4/+25
| |\|
| | * dbsrx: limit the USRP1 + DBSRX GPIO clock rate to 4MHzJosh Blum2012-03-261-1/+8
| | | | | | | | | | | | | | | This fixes the lockup/clocking condition when the following hw combo is used: USRP1 r4.5 + DBSRX + another i2c board
| | * usrp2: possible fix for invalid broadcast repliesJosh Blum2012-03-261-3/+17
| | |
| * | fx2: simplify i2c code and overload eeprom read/writeJosh Blum2012-03-261-15/+24
| | | | | | | | | | | | | | | Overload eeprom routines to do it in 1 transaction, since default will split it up into many for each byte.
* | | Merge branch 'master' into nextJosh Blum2012-03-231-3/+4
|\| |
| * | Merge branch 'maint'Josh Blum2012-03-231-3/+4
| |\|
| | * usrp: fix for rx_frontend_core_200 dc offsetJosh Blum2012-03-231-3/+4
| | | | | | | | | | | | | | | Mask off upper bits when setting a constant offset (I and Q regs). The sign bits (if negative) can flow off into the flags field.
* | | sbx: various fixes and tweaks for lockingJosh Blum2012-03-231-4/+3
| | |
* | | sbx: mods for PLL sync resetJosh Blum2012-03-231-3/+6
| | |
* | | sbx: no readback during tuning, cache lock detect status when readJosh Blum2012-03-234-12/+26
| | |
* | | fifo ctrl: code reorganization and integer wrap-around arithmeticJosh Blum2012-03-231-65/+90
| | |
* | | fifo ctrl: implement timed command feature detectionJosh Blum2012-03-232-2/+12
| | |
* | | fifo ctrl: use regular iface for U2_REG_MISC_CTRL_CLOCKJosh Blum2012-03-231-6/+7
| | |
* | | fifo ctrl: various tweaksJosh Blum2012-03-233-10/+9
| | |
* | | fifo ctrl: ~usrp2_fifo_ctrl acks, usrp2 DCM workaround, bootloader no blinkieJosh Blum2012-03-231-0/+8
| | |
* | | fifo ctrl: spi core work and host implementationJosh Blum2012-03-237-23/+88
| | |
* | | spi: work on fw support for simple spi coreJosh Blum2012-03-231-2/+2
| | |
* | | usrp2: permanent timeout increase for timed commandsJosh Blum2012-03-231-2/+6
| | |
* | | usrp2: implementation of timed commands workingJosh Blum2012-03-234-7/+49
| | |
* | | usrp2: integrated fifo ctrl into usrp2 modules, implemented window'd ackingJosh Blum2012-03-234-65/+76
| | |
* | | usrp2: added vrt pack/unpacker to fifo ctrlJosh Blum2012-03-231-33/+46
| | |
* | | usrp2: host and fw implementation for fifo controlJosh Blum2012-03-236-3/+173
|/ /
* / usrp2: work on alternative stream destinationJosh Blum2012-03-234-28/+116
|/
* usrp: fix typo for user setting regJosh Blum2012-03-211-1/+1
|
* uhd: add calls to query an ABI compat stringJosh Blum2012-03-211-1/+5
|
* Disabling the SBX mixer and baseband amp causes griefJason Abele2012-03-161-1/+1
| | | | | Some ADA4927 / AD5380 combinations do not appreciate being disabled, so lets not disable them
* B100: enable_gpif(0) disables FIFO output clock on FX2. this prevents the ↵Nick Foster2012-03-161-2/+2
| | | | "stuffing zeroes" problem and improves transport reliability.
* usrp: fix from "rev iq correction"Josh Blum2012-03-163-6/+6
| | | | Must zero out the default IQ correction to have zero effect by default.
* n2x0: adjustment for phase delay over mimo cableJosh Blum2012-03-141-1/+1
|
* uhd: make atlbase options for msvc buildJosh Blum2012-03-142-4/+16
|
* uhd: rev iq correction numbers formatJosh Blum2012-03-143-47/+10
|
* usrp: fix wildcard set for time/clock sourceJosh Blum2012-03-121-2/+2
|
* uhd: added fullscale option stream argJosh Blum2012-03-112-0/+4
|
* Make DBSRX* set default bandwidth based on codec rateJason Abele2012-03-112-2/+7
|