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* b200: Added variable rate SPI core for AD9361 and ADF4001Ashish Chaudhari2014-08-018-8/+159
| | | | | - Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz
* b200: Moved AD9361 driver to hostAshish Chaudhari2014-08-0118-131/+2872
| | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
* OctoClock firmware upgrade, added host driverNicholas Corgan2014-07-237-11/+17
| | | | | | | | | | * OctoClock can communicate with UHD over Ethernet * Can read NMEA strings from GPSDO and send to host * Added multi_usrp_clock class for clock devices * uhd::device can now filter to return only USRP devices or clock devices * New OctoClock bootloader can accept firmware download over Ethernet * Added octoclock_burn_eeprom,octoclock_firmware_burner utilities * Added test_clock_synch example to show clock API
* Commented out warning if X300 reference clock fails to lock within 1 second ↵michael-west2014-07-221-2/+3
| | | | during initialization. Sometimes it takes longer and that is OK.
* Fix for BUG #517: B200: Regression of power level on RXmichael-west2014-07-221-1/+1
| | | | - Fixed scalar for RX DSP core
* Updated copyright year.michael-west2014-07-171-1/+1
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* Fix for BUG #469michael-west2014-07-171-0/+2
| | | | - Added mutex for write_uart()
* - Changed variables from uint8_t to uint32_t so parsing of hex strings would ↵michael-west2014-07-171-3/+3
| | | | work properly.
* Addressing comments from review.michael-west2014-07-172-15/+21
| | | | | | - Corrected types of some variables to be boost types. - Removed debugging code accidentally left in. - Changed some compiled out error messages to log messages.
* Fix for BUG #469: Bad/Empty GPS NMEA strings returned when the queries are ↵michael-west2014-07-172-20/+108
| | | | | | | | | made in a random wait iterative fashion Fix for BUG #460: X300: GPGGA sensor most often empty, while RMC is usually OK - Added checksum verification of NMEA strings - Improved handling of short or malformed strings - Fixed GPSDO data synchronization between X300 firmware and host
* Merge branch 'origin/b200/bug516' into maintBen Hilburn2014-07-171-4/+4
|\ | | | | | | Fixing B200 clock rate float compare.
| * BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-07-101-1/+1
| | | | | | | | - Addressed feedback from review.
| * Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-06-181-3/+3
| | | | | | | | - Corrected clock rate checks for B2x0
| * Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-06-181-3/+3
| | | | | | | | - Corrected clock rate checks for B2x0
* | Merge branch 'origin/ashish/rx_pcie_overflows' into maintBen Hilburn2014-07-172-3/+7
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| * | x300: Bugfix for overflows on PCIe at 200MS/sAshish Chaudhari2014-06-272-3/+7
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* | Merge branch 'origin/b200/bug512' into maintBen Hilburn2014-07-171-9/+15
|\ \ | | | | | | | | | B200 now creates internal PPS. Depends on FPGA change.
| * | Enhancement #512: B210: Need an Internal PPSmichael-west2014-06-131-9/+15
| | | | | | | | | | | | - Added support for internal PPS selection (set as default)
* | | Fix for BUG #527: N200: 50 Msps results in two tonesmichael-west2014-07-011-1/+2
| |/ |/| | | | | - Adjusted check to enable first half-band filter only if the rate is decimated enough between the CIC and other half-band filter
* | Merge branch 'origin/b200/bug500' into maint - Fixing B200 phase alignment issueBen Hilburn2014-06-163-3/+9
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| * - Changed XOR to OR for REG_DSP_RX_MUX flags.michael-west2014-06-121-3/+3
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| * Fix for BUG #500: B210: RX channels are not phase alignedmichael-west2014-06-063-3/+9
| | | | | | | | - Adding UHD side code to invert second RX channel
* | Lots of bit-specific type work to fix compilation on older OSes.Ben Hilburn2014-05-214-15/+15
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* x300: adding include to fix builds on older systemsBen Hilburn2014-05-201-0/+1
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* Fixing Bug #473 - Autoselection of VCO Frequency in DBSRX2Ben Hilburn2014-05-201-6/+8
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| * Fixed whitespace and added comment.michael-west2014-05-201-5/+6
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| * Fix for BUG 473: UHD: DBSRX2 VCO Autoselect Failing / Wrong Frequency Rangemichael-west2014-05-131-3/+4
| | | | | | | | | | - Corrected frequency range for DBSRX2 - Corrected register write order when changing frequency
* | Fix for BUG 456: LED TX/RX colors backwards on X300michael-west2014-05-161-2/+2
|/ | | | - Corrected bit masks so TX will light the red LED and RX will light the green LED
* Merge branch 'origin/martin/multi_usrp/bug_dc_offset' into maintBen Hilburn2014-05-081-5/+25
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| * multi_usrp: Throws warnings for some tree propsMartin Braun2014-05-051-5/+25
| | | | | | | | | | | | | | Until now, multi would simply access some property and assume it exists. A call for set_tx_dc_offset() on a B210 would thus throw errors. This checks for B-series-only leaf nodes before doing anything and displays a warning instead.
* | BUG #460: X300: GPGGA sensor most often empty, while RMC is usually OKmichael-west2014-05-061-1/+8
| | | | | | | | | | | | - It was found that strings containing only a newline character were being returned by N-series and X-series devices. - Added better handling of strings received under 6 bytes. - Added erasing of end of line characters.
* | usrp2: fixed usrp2_card_burner.py and usrp_n2xx_simple_net_burner paths in ↵Nicholas Corgan2014-05-062-4/+17
|/ | | | incompatibility error messages
* x300: Bumped FPGA compat number to 6.Ashish Chaudhari2014-04-281-1/+1
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* x300: Changed bus_clk frequency to 166.67MHz.Ashish Chaudhari2014-04-281-1/+1
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* x300: Bumped FPGA compat number to 5.Ashish Chaudhari2014-04-251-1/+1
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* x300: Addressed review feedbackAshish Chaudhari2014-04-251-11/+13
| | | | | - Fixed synchronization for unclaim - Removed stray RIO addr space set
* x300: Added synchronization between device claiming and checking.Ashish Chaudhari2014-04-242-5/+40
| | | | | - We now maintain a registry of pcie ZPU transports - Added static mutex for claimer
* x300: Added hardware flush mechanism to PCIe logic.Ashish Chaudhari2014-04-241-2/+8
| | | | | - Added DMA enabled states to DMA logic to allow for hardware data flushing during init. - niusrprio_session will now check for FPGA busy before downloading
* Merge branch 'origin/uhd/issue_448_itemsize' into maintBen Hilburn2014-04-211-1/+1
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| * multi_usrp: Fixed bug which caused unspecified OTW-format to crash appsMartin Braun2014-04-151-1/+1
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* | x300: removing intelligent PPS detection until further developmentBen Hilburn2014-04-151-1/+2
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* Merge branch 'origin/ncorgan/tvrx2_fix'Ben Hilburn2014-04-101-3/+3
|\ | | | | | | Fix bug with regard to TVRX2 refclock dividers.
| * tvrx2: fix ref_clock logic when using N2x0Nicholas Corgan2014-04-091-3/+3
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* | Merge branch 'origin/b200/issue_418'Ben Hilburn2014-04-103-11/+14
|\ \ | | | | | | | | | Fixing unsafe sscanf call.
| * | b100+b200+usrp1: removed potentially unsafe sscanf callMartin Braun2014-04-103-11/+14
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* | | Merge remote-tracking branch 'origin/bug403'Ben Hilburn2014-04-101-2/+4
|\ \ \ | | | | | | | | | | | | | | | | Properly initializing time and clock source on N-Series to prevent small drift prior to lock.
| * | | Fix for BUG #403: Visible frequency drift on Finite Rx with N210 & SBXmichael-west2014-04-081-2/+4
| |/ / | | | | | | | | | - Added initialization of clock and time sources
* | | Merge branch 'martin/warn_sampling_rate'Ben Hilburn2014-04-1010-3/+62
|\ \ \ | | | | | | | | | | | | Warn users if they request a sample rate greater than the interface bandwidth.
| * | | uhd: Added max link rate info for usrp1, usrp2 and b100Martin Braun2014-04-105-1/+5
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| * | | b200: Added max link rate infoMartin Braun2014-04-102-1/+4
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