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* Created a common usrp dsp utils to handle register word calculations.Josh Blum2010-06-073-56/+123
* Replaced the vrt pack and unpack with a pack and unpack for big endian and a ...Josh Blum2010-06-071-0/+2
* moved dsp update logic into prop setter, added code to init dsp rates and freqsJosh Blum2010-06-042-36/+26
* usrp2 regs naming conventionJosh Blum2010-06-048-114/+114
* move get clock rate into clock controlJosh Blum2010-06-046-16/+13
* also use an mtu size recv buffer for the control packet recvJosh Blum2010-06-041-6/+7
* Prepend usrp2 onto the helper classes in usrp2 impl to avoid symbol conflicts.Josh Blum2010-06-049-32/+35
* recv discovery packets with max size buffer (we dont know what to expect)Josh Blum2010-06-041-4/+5
* Created macros for dealing with pimpls and implemented in code.Josh Blum2010-06-023-6/+7
* replaced the assert falses with an invalid code path exceptionJosh Blum2010-06-024-8/+8
* use smart pointer for io impl, simplify send buffer callbackJosh Blum2010-06-023-14/+4
* disable boost thread interrupt when doing pop with timed wait, fixed error on...Josh Blum2010-06-021-2/+4
* Merge branch 'refactor_db'Josh Blum2010-06-012-131/+172
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| * Refactor WBX and RFX to use conventions more like XCVRJason Abele2010-06-012-131/+172
* | Implemented pirate thread, moved io impl details into io impl cpp file. Fixed...Josh Blum2010-06-013-11/+70
* | Moved the packet handler state stuff into a separate header (so we dont pull ...Josh Blum2010-06-012-3/+13
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* fix for msvc warningJosh Blum2010-05-281-1/+1
* Tweak with the udp and zero-copy transport. Eventually, the caller will hang ...Josh Blum2010-05-271-1/+1
* Added support to set GPIO pins from dboard interface:Josh Blum2010-05-248-16/+48
* fix for time64 register write orderJosh Blum2010-05-241-3/+5
* rfx dboard code minor refactor to look more like xcvr2450 codeJosh Blum2010-05-191-43/+73
* init values in dboards to remove gcc warningsJosh Blum2010-05-183-3/+9
* clock bypass divider fixes, forgot to move this part into the hostJosh Blum2010-05-181-0/+8
* Added tx timed samples example.Josh Blum2010-05-184-18/+10
* Added send and recv modes to the device class and packet handler implementation.Josh Blum2010-05-182-6/+18
* Created inline send vrt packer function that also handles fragmentation.Josh Blum2010-05-172-44/+11
* work on generic packet handler (got rx working)Josh Blum2010-05-172-95/+8
* calculate max samples per packet using otw typeJosh Blum2010-05-174-19/+37
* added set freq with lo offset to simple usrp wrapperJosh Blum2010-05-141-0/+8
* fix to ad9777 dac controlJosh Blum2010-05-131-2/+2
* Moved usrp2 eeprom addr read/write to host control over i2c/eeprom interface ...Josh Blum2010-05-114-48/+23
* Added a place for serdes control on the host.Josh Blum2010-05-109-14/+100
* Moved adc and dac control into codec control source file.Josh Blum2010-05-1010-56/+158
* Merge branch 'shrinkfw' into usrp2Josh Blum2010-05-105-60/+90
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| * Moved some misc setting registers into host.Josh Blum2010-04-282-5/+28
| * Added reload flag to the stream cmd.Josh Blum2010-04-285-56/+63
* | fix for first seqno on rx, init the variableJosh Blum2010-05-071-0/+3
* | moved uhd lib cmake contents into respective subdirectoriesJosh Blum2010-05-063-0/+82
* | fixed exception caseJosh Blum2010-05-051-2/+1
* | code tweaks to get wbx compiling with masterJosh Blum2010-05-041-5/+5
* | Merge branch 'wbx' of git@ettus.sourcerepo.com:ettus/uhdprivJosh Blum2010-05-042-4/+633
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| * | Inverted logic in halfband selectionJason Abele2010-05-041-2/+6
| * | Fixed unguarded debug messageJason Abele2010-05-041-3/+5
| * | added hb filter calculation on usrp2 dsp implJosh Blum2010-05-041-4/+16
| * | First working RX/TX WBX in UHDJason Abele2010-05-041-7/+11
| * | Fixed SPI register lengthJason Abele2010-05-041-10/+19
| * | Fixed casts in set_freq and attenuator bit maskJason Abele2010-05-031-9/+11
| * | First pass WBX code, it compilesJason Abele2010-05-031-120/+212
| * | Added first wbx dboard codeJason Abele2010-04-261-0/+504
* | | minor fix to pass dboard ctor args with correct dbidsJosh Blum2010-05-031-2/+4