| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
|
|
|
| |
Whitespace changes only.
|
| |
|
|
|
|
| |
Exposing getters, setters, and options for multi_usrp sync source.
|
|
|
|
|
|
|
| |
Fixes compiler errors on newer Boost. boost::posix_time::microseconds()
requires a int64_t.
Signed-off-by: Andreas Müller <schnitzeltony@gmail.com>
|
| |
|
|
|
|
|
| |
Recent clocking changes set the minimum master clock rate to 187.5MHz,
instead of the actual 184.32MHz. This change corrects that.
|
| |
|
| |
|
| |
|
|
|
|
|
|
|
|
| |
Add a new clocking mode to automatically configure arbitrary master
clock rates.
Co-authored-by: Brent Stapleton <brent.stapleton@ettus.com>
Co-authored-by: Martin Braun <martin.braun@ettus.com>
|
|
|
|
| |
- This broke tx streaming via the multi_usrp API.
|
|
|
|
|
|
|
|
| |
UHD currently only uses a single ethernet link for tx data, even if the
device is initialized with dual 10GbE links. Using both links when a DMA
FIFO is present causes sequence errors due to DMA FIFO bandwidth
limitations. This maintains the current default behavior but allows
users to override it through a device arg "enable_tx_dual_eth".
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Also updates our coding style file.
Ancient CMake versions required upper-case commands. Later command
names became case-insensitive. Now the preferred style is lower-case.
Run the following shell code (with GNU compliant sed):
cmake --help-command-list | grep -v "cmake version" | while read c; do
echo 's/\b'"$(echo $c | tr '[:lower:]' '[:upper:]')"'\(\s*\)(/'"$c"'\1(/g'
done > convert.sed \
&& git ls-files -z -- bootstrap '*.cmake' '*.cmake.in' \
'*CMakeLists.txt' | xargs -0 gsed -i -f convert.sed && rm convert.sed
(Make sure the backslashes don't get mangled!)
|
|
|
|
|
|
|
| |
Reading motherboard sensor, sometimes, takes more than 2 seconds.
We don't have asynchronous RPC, increase this timeout will help
long sensor reading such as reading GPSD value when GPSD connection
is unreliable.
|
| |
|
|
|
|
|
| |
None of our FPGA images support a 120 MHz master clock rate, so the UHD
code should match that.
|
|
|
|
| |
- Improves performance for frequencies greater than 3.5 GHz
|
|
|
|
|
|
|
|
|
| |
- This is a combination of 5 commits.
- rh: add lo distribution board gpio expander
- rh: add lo distribution mpm functions
- rh: add code to conditionally initialize lo distribution
- rh: change empty i2c device from exception to assertion
- rh: add lo distribution board control
|
| |
|
| |
|
|
|
|
|
|
| |
Co-authored-by: Humberto Jimenez <humberto.jimenez@ni.com>
Co-authored-by: Alex Williams <alex.williams@ni.com>
Co-authored-by: Derek Kozel <derek.kozel@ni.com>
|
| |
|
|
|
|
| |
EEPROM
|
|
|
|
|
| |
- Limit initialization to ZPU communication if recover_mb_eeprom=1 is
set in device args.
|
| |
|
|
|
|
|
| |
- This is the only read operation in the driver, so removing it simplifies the
driver's requirements significantly.
|
| |
|
|
|
|
| |
No functional or API changes.
|
|
|
|
|
|
|
|
|
|
| |
The sync_source API is an atomic setter for all sync-related settings.
If supported by the underlying USRP, it can be faster to call
set_sync_source() rather than sequentially calling set_clock_source()
and set_time_source().
If the underlying device does not support the sync_source API, it will
fall back to the set_clock_source() and set_time_source() APIs, making
this change backward-compatiple.
|
|
|
|
|
|
|
| |
set_time_source() for N310 and N300 can take longer than the default RPC
client timeout of 2 seconds due to dboard initialization.
We need increase this timeout, by using the init timeout value which is
2 minutes.
|
|
|
|
|
|
| |
After going to 2 radios configuration (FPGA), the channnel value
is passed into this set_rx_antenna now have value either 0 or 1.
We want the mapping of {radio_channel:cpld_channel} = {0:CHAN1} or {1:CHAN2}.
|
|
|
|
| |
ALL_MBOARDS and ALL_CHANS will be exported on GCC and MSVC
|
|
|
|
|
|
|
| |
This tracks the changes on rx_frontend_gen3.v, which was updated to use
a quarter-rate downconverter instead of a generic CORDIC. The X3x0 FPGA
compat number is incremented as the rx_frontend is part of the device
architecture rather than an RFNoC block.
|
|
|
|
|
|
| |
The master clock rate was getting overwritten while
running the codec loopback self test. So now we save the
current rate before running the test and then reapply it.
|
| |
|
|
|
|
|
| |
Clipping requested frequency to acceptable ranges in Magnesium TX/RX
set frequency functions.
|
|
|
|
| |
...that are already handled in udp_zero_copy.
|
|
|
|
|
| |
we're no longer need this. Because there are default send buff size in
each transport type impl.
|
|
|
|
| |
This is used to determine send_buff_size and recv_buff_size
|
| |
|
|
|
|
| |
The gpio devtest passes after this fix. Enabling the test
|
| |
|
|
|
|
|
| |
Now matches the FPGA error message (go download, then run
uhd_image_loader).
|
| |
|
|
|
|
|
| |
- AMP_LO1_EN_CH1 controls U2, the amp for the external LO1 port, so it must
be set high if channel 2 is using an external LO (external or reimport)
|
|
|
|
|
|
|
|
|
|
| |
The C/C++ standards don't define what time_t is, only that it is
arithmetic (and real for C11, and integral for C++). It should not be
used in portable software and is only used as the return value for some
libc calls.
A common definition for time_t is int64_t, so we'll switch to that
permanently in our own APIs. System APIs will of course stick with
time_t.
|
|
|
|
|
|
|
|
|
|
|
| |
For USRPs that support user settings (e.g., B2xx, N230), this will
return an object that will allow peeking and poking user-defined
settings registers.
Mock code example:
auto usrp = multi_usrp::make(...);
auto user_settings_iface = usrp->get_user_settings_iface();
user_settings_iface->poke32(0, 23);
|
| |
|
|
|
|
| |
No functional changes. Cleanup only. A little less Boost.
|
|
|
|
|
|
|
|
|
|
| |
You can now change the time/clock source default through device args:
auto usrp = uhd::usrp::multi_usrp::make(
"type=x300,clock_source=external,time_source=external");
This also enables the use of config files for the clock/time source
implicitly.
|