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* bugfix#1102: Prevented X300 DAC FIFO from underflowingAshish Chaudhari2016-05-253-15/+4
| | | | | | | - The spectral distortion was begin caused by the DAC FIFO underflowing. The fix was to run through the DAC sync procedure which uses the falling edge clock to sample the RefClk and sync it with the data clk
* b200: Changed implicit conversion to explicit conversion for wptrAndrew Lynch2016-05-051-2/+2
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* b200: Changed tree sptr in lambda to wptrAndrew Lynch2016-05-041-2/+6
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* b200: Fixed setting of max rateMartin Braun2016-04-222-10/+18
| | | | | | | DSP rates are now being tracked as in whether or not they've been set. We can disregard unset DSPs for the automatic clock rate calculation. Reviewed-By: Derek Kozel <derek.kozel@ettus.com>
* e3xx: spi: Fix issue introduced in 1b149f56Moritz Fischer2016-04-191-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kernels (3.15+) introduce the possibility to do DUAL and QUAD spi operations via spidev. Prior to this commit nothing was setting the {tx,rx}_nbits members of the struct spi_ioc_transfer. from include/uapi/linux/spi/spidev.h struct spi_ioc_transfer { __u64 tx_buf; __u64 rx_buf; __u32 len; __u32 speed_hz; __u16 delay_usecs; __u8 bits_per_word; __u8 cs_change; __u8 tx_nbits; __u8 rx_nbits; __u16 pad; }; This turns into an issue on more recent kernels, where it turns all transactions into QUAD transactions, while the controller actually doesn't support that mode of operation. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
* gpio core: Fixed a mismatch in the address assignment for RX and full duplexPaul David2016-04-061-2/+2
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* ubx: Changed member declaration to satisfy debug builds on WindowsMartin Braun2016-03-291-1/+1
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* Added missing stdint.h includeNicholas Corgan2016-03-221-1/+2
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* Fixed minor warnings:Nicholas Corgan2016-03-042-3/+3
| | | | | | * nirio_driver_iface_win: labeled unused variable for MinGW builds * b200_impl: fixed unreferenced variable warning * n200_image_loader: fixed signed vs. unsigned comparison
* x300: Added power cycle message to uhd_image_loaderMartin Braun2016-03-031-0/+2
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* e300: Fixed a memory leak in udev codeMarcus Müller2016-03-031-2/+3
| | | | | When querying temp mboard sensor on e300, sysfs attributes are read through udev.
* Enable multiple programs to use USB USRPs on WindowsDerek Kozel2016-02-291-4/+6
| | | | | | | Window's WinUSB driver doesn't support multiple processes accessing a single USB device and libusb_open returns LIBUSB_ACCESS_ERROR when trying to access an already claimed USRP. One device access did not catch this exception and caused UHD to error during USRP discovery.
* UBX: Phase synchronizationmichael-west2016-02-187-99/+340
| | | | | | | - Disabled MAX2871 VCO auto selection for phase sync - Added checks for new phase sync constraints recently published by Maxim - Added dboard_clock_rate option for X300 - Adjusted timing of SYNC signal relative to dboard referenc clock
* B200: Fix for increasing retune timesmichael-west2016-02-051-2/+2
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* cmake: removed unnecessary includeNicholas Corgan2016-01-181-3/+1
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* e3xx: Added FPGA loading code for speedgrade 3 devices.Moritz Fischer2015-12-165-15/+29
| | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
* ADF4002: Fix register programming (bug #974)michael-west2015-12-151-4/+4
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* b200: Factored ihex routines out of b200_ifaceMartin Braun2015-12-141-160/+23
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* B2xx: Added B205mini support.michael-west2015-12-104-35/+46
| | | | | | - Add support to b200_impl - New INF file - Removed references to old 'B205' name
* b2xx,e3xx,x300: Bumped FPGA compat numbers after SW time-sync changesAshish Chaudhari2015-12-103-4/+4
| | | | | | | - b200: compat 13 - b200mini: compat 4 - e3xx: compat 14 - x3xx: compat 19
* Bumped FPGA compat numbers for B200, X300, and E300.michael-west2015-12-103-3/+3
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* B200/E300: Set time sync on clock rate change to current time of first radiomichael-west2015-12-104-8/+20
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* B210/E300: Re-sync times after master clock rate change.michael-west2015-12-102-0/+6
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* E300/X300: Add VITA time synchronization on internal signalmichael-west2015-12-105-6/+32
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* B210: Add VITA time synchronization on internal signalmichael-west2015-12-105-10/+30
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* e300: added virtual destructor to e300_sensor_manager classNicholas Corgan2015-12-081-1/+3
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* max287x: assert target_freqMartin Braun2015-10-161-0/+1
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* e3xx: sysfs: Drop reference when we're done.Moritz Fischer2015-10-141-0/+2
| | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
* fixup! ad9361: codec manager needs more includes on some platformsMartin Braun2015-10-121-0/+1
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* B200: Fix for CODEC loopback test failuremichael-west2015-10-121-4/+34
| | | | - Add delay after putting CODEC in loopback mode
* b2xx,e3xx,x300: Bumped compat numbers for 3.9.1 UHD releaseAshish Chaudhari2015-09-033-4/+4
| | | | | | | - b200: compat 11 - b200mini: compat 2 - e300: compat 11 - x300: compat 15
* b2xx: Removed DCM reset bit (obsolete)Martin Braun2015-09-032-3/+2
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* b200mini: Change AD9364 interface timing for new IO design.Ian Buckley2015-09-031-17/+3
| | | | Removes all DCM reset codes.
* cores: Corrected scaling_adjustment calculationIan Buckley2015-09-034-12/+42
| | | | | | Compensate for headroom required to rotate a signal in the CORDIC. Fixes some CORDIC-related clipping issues, that reduced ENOB to 15 or 14.5 bits.
* b200: fix startup bad USB state detection printout to use endl instead of ↵Michael Dickens2015-09-021-1/+1
| | | | flush to print cleanly.
* X300: Fix base address for FP GPIOmichael-west2015-09-011-1/+1
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* UHD: Fix max287x N divider rangesmichael-west2015-09-011-5/+5
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* Fixed minor warningsNicholas Corgan2015-09-014-6/+6
| | | | | | * Unreferenced exceptions in try-catch statements * Incorrect function documentation * Unlabelled unused variables
* b200: on startup when the bad USB state is detected, print this out for the ↵Michael Dickens2015-09-011-0/+1
| | | | user to see, with brevity.
* B2XX: Added B200mini supportmichael-west2015-08-1710-92/+277
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* x300: Removed call to is_pps_presentAshish Chaudhari2015-08-171-4/+4
| | | | - It's status is thrown away anyway
* C API: added soft register APINicholas Corgan2015-08-141-0/+48
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* gps_ctrl: code cleanupNicholas Corgan2015-08-141-11/+11
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* multi_usrp: comment out for-now unused function to remove warningNicholas Corgan2015-08-141-2/+2
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* b200,e300,x300: Updated compat number for release 3.9.0Ashish Chaudhari2015-08-143-3/+3
| | | | | | - b200: compat 10 - e300: compat 10 - x300: compat 14
* ad9361: Delay Tx Quad Cal from initialization to streamer startTom Tsou2015-08-131-2/+8
| | | | | | | | | | | | | | | | | | | Patch addresses issue: #742 "tx_waveforms seems to produce unexpectedly large image" Tx Quad Cal performance is temporally dependent with better results when run after the AD9361 is configured for transmission than at initialization. This gets is roughly 5-10 dB of additional quadrature image suppression. Even better performance can be reached when Tx Quad Cal is run after streaming and the AD9361 is actively transmitting. Calibration in this state, however, requires user intervention by retuning the transmit chain by > 100 MHz. Total IQ suppression should be in the range of 40-50+ dBFS dependent on operating frequency. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* ad9361: Use separate Tx and RX frequency calibration intervalsTom Tsou2015-08-132-19/+39
| | | | | | | | | | | | | | | | | | Patch addresses issue: #872 "B200: Tx and Rx calibration share same frequency state" ADI specifies recalibration for certain paths when the LO shifts by more than 100 MHz. Tx and Rx maintain independent LO frequencies so use separate values for determining whether to perform re-calibration at tuning intervals. Also, maintain last calibration frequencies from initialization and clock rate changes. Doing so prevents a re-calibration if the first requested Tx or Rx frequency is close to the default values of 850 and 800 MHz respectively. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* ad9361: Reconfigure RF and baseband DC offset correctionTom Tsou2015-08-132-37/+39
| | | | | | | | | | | | | | | | | | | | | | | | Addressed and related issues: #186 "B200: Catalina RX signal distortion" #821 "Incorrect behavior with auto DC Offset correction turnned off" #820 "Rx DC Offset Correction Convergence on B2xx Dependent on Master Clock Rate" #755 "Demodulate IQ signal amplitude oscillation on B210 at 200 MHz carrier" Due to recent change "ad9361: Invert phase on Rx LNA bypass path", we now have uniform phase alignment across the entire gain range. This drastically improves performance of RF DC tracking - not to be confused with the - active and input dependent - baseband (BB) DC tracking loop. RF DC tracking is not affected by input signals and updates during gain changes. The updated configuration provides improved DC suppression for operation whether BB tracking loop is enabled or disabled. New behavior differs from the previous case where disabling BB tracking would clear all - static and active - calibration tables. Now, static correction tables are not wiped when BB tracking is turned off. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* ad9361: Enable single shot Rx Quad CalTom Tsou2015-08-132-31/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | Patch provides an alternative resolution to issue #807 "B210: severe distortion on In-phase data for some gain settings" Rx quadrature tracking, an active input-sensitive loop, causes problems on a handful of receive signals. Problematic signals include pulsed GMSK and near-DC tones among others. As an alternative, improve operation when active tracking is disabled. Run single shot quadrature calibration at the following events to provide calibrated image suppression. The corrections without active tracking are not input dependent. Rx quadrature single shot calibration points: 1. AD9361 initialization 2. Clock rate change 3. Tuning differences greater then 100 MHz when tracking is disabled Note that if tracking is enabled (default case), this patch has no effect during streaming. Only the non-default (user set) case is affected. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* uhd: Fixes to build with MSVCAshish Chaudhari2015-08-131-1/+1
| | | | | - Included list header in soft_reg header - Fixed typo in x300_impl
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