aboutsummaryrefslogtreecommitdiffstats
path: root/host/lib/usrp
Commit message (Collapse)AuthorAgeFilesLines
...
* Initial commit E300 support.Martin Braun2014-10-0734-0/+7080
|
* b200: Bumped FX3 firmware compat number to 7.Ashish Chaudhari2014-10-011-1/+1
|
* Merge branch 'maint'Martin Braun2014-09-258-55/+177
|\
| * x300: Reverted back to no analog delay for DAC ref clocksmichael-west2014-09-251-5/+0
| |
| * x300: added reset and resync of ADCs and DACs when changing reference clockmichael-west2014-09-256-54/+166
| |
| * B200: added support for reading the exact product name from EEPROM for B200 ↵Neel Pandeya2014-09-251-0/+15
| | | | | | | | and B210
* | Merge branch 'maint'Martin Braun2014-09-243-9/+2
|\|
| * x300: Added output sync for DAC reference clocksMartin Braun2014-09-241-0/+1
| |
| * uhd: Fixed logging bug (#476) -- UHD logging has unexplained effect on ↵michael-west2014-09-241-8/+0
| | | | | | | | | | | | | | packet loss. - Removed logging from radio_ctrl_core_3000 - Changed logging facility to prevent type conversion when message is not logged
| * sbx: Fixed logging string (showed TX instead of RX)Martin Braun2014-09-241-1/+1
| |
* | Merge branch 'maint'Martin Braun2014-09-234-9/+6
|\|
| * usrp: don't print duplicate GPSDO detection messagesNicholas Corgan2014-09-233-6/+1
| |
| * cbx: Fixed LO FRAC truncationMartin Braun2014-09-231-4/+6
| |
* | b200: Set sensible defaults for freq, gain and rate at startupMartin Braun2014-09-022-5/+19
| |
* | ad9361: Made recommended rate a constantMartin Braun2014-09-023-3/+4
| |
* | Give user the option to ignore daughterboard's calibration file at runtimeNicholas Corgan2014-09-028-11/+35
| | | | | | | | | | * Add "ignore-cal-file" to the uhd::device_addr_t arguments * Added documentation for new feature
* | Added missing pure virtual destructors to base classesNicholas Corgan2014-09-0162-62/+269
| |
* | Merge branch 'maint'Martin Braun2014-09-011-1/+1
|\|
| * x300_dboard_iface: added UHD_UNUSED() macro to unused parameters in ↵Nicholas Corgan2014-08-291-1/+1
| | | | | | | | | | | | set_clock_enabled() * Removes GCC warning about unused parameters
* | uhd: Changed line endings from Windows -> UNIXAshish Chaudhari2014-08-212-2039/+2039
| |
* | ad9361: Output PLL lock status on ctrl output pins.Ashish Chaudhari2014-08-211-1/+1
| |
* | b100: More RX buffersMartin Braun2014-08-211-1/+2
| | | | | | | | | | Increases number of recv frames where recv_frame_size is min'd with 2K (B100_MAX_PKT_BYTE_LIMIT), therefore increasing buffer slack.
* | Merge branch 'master' into ashish/cat_refactor_phase2Ashish Chaudhari2014-08-206-57/+43
|\ \
| * | Merge branch 'maint'Martin Braun2014-08-186-57/+43
| |\|
| | * Bumping FPGA compat to 7.michael-west2014-08-181-1/+1
| | |
| | * Changed analog delay on DAC reference and radio clocks from 1075ps to 900psmichael-west2014-08-181-4/+4
| | |
| | * - Fixes for channel alignmentmichael-west2014-08-185-56/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Added analog delay for radio clock - Added analog delay for DAC reference clocks - Removed resetting of clock control - Removed setting of reference clock and PPS to external sources during initialization - Fixes for set_time_unknown_pps - Removed wait for PPS edge after setting time from GPSDO - Changed set_time_unknonw_pps to time out based on system time rather than device VITA time
* | | ad9361: Fixed MSVC build issuesAshish Chaudhari2014-08-132-2034/+2039
| | |
* | | ad9361: Fixed debug messages with UHD_LOGsAshish Chaudhari2014-08-131-19/+15
| | |
* | | ad9361: Fixed TX direction bug in ad9361_ctrlAshish Chaudhari2014-08-131-1/+1
| | |
* | | ad9361: Added synchronization to IO and device classesAshish Chaudhari2014-08-133-20/+36
| | |
* | | ad9361: Cleaned up constants and macrosAshish Chaudhari2014-08-134-84/+67
| | |
* | | ad9361: Cleaned up errors and debug messagesAshish Chaudhari2014-08-121-45/+46
| | |
* | | ad9361: Converted stdint types to boost typesAshish Chaudhari2014-08-127-136/+133
| | |
* | | ad9361: Renamed ad9361_impl.c to ad9361_device.cppAshish Chaudhari2014-08-122-6/+1
| | |
* | | b200, ad9361: Cleanup up AD9361 driverAshish Chaudhari2014-08-1213-1553/+1122
| | | | | | | | | | | | | | | - Removed transaction interface - Made the driver a C++ class
* | | b200: Removed all AD9361 related firmwareAshish Chaudhari2014-08-123-85/+1
|/ / | | | | | | | | | | | | - FX3 does not respond to AD9361 firmware transaction VREQs - FX3 does not respond to AD9361 SPI transaction VREQs - Deleted all AD9361 firmware files - Bumped FW compat to 6
* | Merge branch 'master' into ashish/cat_refactor_masterAshish Chaudhari2014-08-054-11/+35
|\ \
| * | Merge branch 'maint'Martin Braun2014-07-314-11/+35
| |\| | | | | | | | | | | | | Conflicts: host/utils/usrp_burn_mb_eeprom.cpp
| | * Merge branch 'maint' into uhd/bug492michael-west2014-07-307-49/+167
| | |\ | | | | | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.cpp
| | | * tx fe corrections: fixing mixed tabs / spaces, other horrible whitespace cruftBen Hilburn2014-07-252-14/+11
| | | |
| | | * Merge 'maint' into x300/bug513Ben Hilburn2014-07-252-3/+4
| | | |\
| | | * | X300: Added UHD support for TX FEIan Buckley2014-07-182-1/+14
| | | | |
| | * | | Fix for BUG #492: UHD: set_time_unknown_pps() fails with GPSDO installedmichael-west2014-06-253-3/+17
| | | | | | | | | | | | | | | | | | | | - Added polling for PPS time change after setting time from GPSDO.
* | | | | b200: Added variable rate SPI core for AD9361 and ADF4001Ashish Chaudhari2014-08-018-8/+159
| | | | | | | | | | | | | | | | | | | | | | | | | - Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz
* | | | | b200: Moved AD9361 driver to hostAshish Chaudhari2014-08-0118-131/+2872
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
* | | / OctoClock firmware upgrade, added host driverNicholas Corgan2014-07-237-11/+17
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | * OctoClock can communicate with UHD over Ethernet * Can read NMEA strings from GPSDO and send to host * Added multi_usrp_clock class for clock devices * uhd::device can now filter to return only USRP devices or clock devices * New OctoClock bootloader can accept firmware download over Ethernet * Added octoclock_burn_eeprom,octoclock_firmware_burner utilities * Added test_clock_synch example to show clock API
* | | Commented out warning if X300 reference clock fails to lock within 1 second ↵michael-west2014-07-221-2/+3
| | | | | | | | | | | | during initialization. Sometimes it takes longer and that is OK.
* | | Fix for BUG #517: B200: Regression of power level on RXmichael-west2014-07-221-1/+1
| |/ |/| | | | | - Fixed scalar for RX DSP core
* | Updated copyright year.michael-west2014-07-171-1/+1
| |