Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | | n230: Improved error for secondary ethernet detection failure | Ashish Chaudhari | 2016-01-08 | 1 | -3/+10 | |
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* | | n230: Added new AD9361 properties to the property tree | Ashish Chaudhari | 2016-01-07 | 3 | -34/+18 | |
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* | | Fixed some cross-platform build issues | Ashish Chaudhari | 2016-01-06 | 2 | -1/+1 | |
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* | | n230: Fixed GPSDO detection logic | Ashish Chaudhari | 2016-01-06 | 6 | -26/+29 | |
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* | | n230: GPIO ATR cleanup and miniSAS GPIO support | Ashish Chaudhari | 2016-01-05 | 6 | -9/+61 | |
| | | | | | | | | | | - Replaced all gpio_200 cores with gpio_3000 - Added support for miniSAS GPIO through FP0 and FP1 banks | |||||
* | | n230: Added N230 device support | Ashish Chaudhari | 2016-01-05 | 29 | -0/+4640 | |
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* | | Merge branch 'maint' | Martin Braun | 2015-12-18 | 5 | -15/+29 | |
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| * | e3xx: Added FPGA loading code for speedgrade 3 devices. | Moritz Fischer | 2015-12-16 | 5 | -15/+29 | |
| | | | | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> | |||||
* | | b2xx,e3xx,x300: Bumped FPGA compat numbers after incompatible maint merge | Ashish Chaudhari | 2015-12-15 | 3 | -4/+4 | |
| | | | | | | | | | | | | | | - b200: compat 14 - b200mini: compat 5 - e3xx: compat 15 - x3xx: compat 20 | |||||
* | | Merge branch 'maint' | Ashish Chaudhari | 2015-12-15 | 16 | -219/+157 | |
|\| | | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.hpp host/lib/usrp/e300/e300_fpga_defs.hpp host/lib/usrp/x300/x300_fw_common.h | |||||
| * | ADF4002: Fix register programming (bug #974) | michael-west | 2015-12-15 | 1 | -4/+4 | |
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| * | b200: Factored ihex routines out of b200_iface | Martin Braun | 2015-12-14 | 1 | -160/+23 | |
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| * | B2xx: Added B205mini support. | michael-west | 2015-12-10 | 4 | -35/+46 | |
| | | | | | | | | | | | | - Add support to b200_impl - New INF file - Removed references to old 'B205' name | |||||
| * | b2xx,e3xx,x300: Bumped FPGA compat numbers after SW time-sync changes | Ashish Chaudhari | 2015-12-10 | 3 | -4/+4 | |
| | | | | | | | | | | | | | | - b200: compat 13 - b200mini: compat 4 - e3xx: compat 14 - x3xx: compat 19 | |||||
| * | Bumped FPGA compat numbers for B200, X300, and E300. | michael-west | 2015-12-10 | 3 | -3/+3 | |
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| * | B200/E300: Set time sync on clock rate change to current time of first radio | michael-west | 2015-12-10 | 4 | -8/+20 | |
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| * | B210/E300: Re-sync times after master clock rate change. | michael-west | 2015-12-10 | 2 | -0/+6 | |
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| * | E300/X300: Add VITA time synchronization on internal signal | michael-west | 2015-12-10 | 5 | -6/+32 | |
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| * | B210: Add VITA time synchronization on internal signal | michael-west | 2015-12-10 | 5 | -10/+30 | |
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* | | Merge branch 'maint' | Martin Braun | 2015-12-09 | 1 | -1/+3 | |
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| * | e300: added virtual destructor to e300_sensor_manager class | Nicholas Corgan | 2015-12-08 | 1 | -1/+3 | |
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| * | max287x: assert target_freq | Martin Braun | 2015-10-16 | 1 | -0/+1 | |
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* | | x3xx,e3xx: Bumped FPGA compat number after register overlap fix | Ashish Chaudhari | 2015-11-24 | 2 | -2/+2 | |
| | | | | | | | | | | - e300: compat 13 - x300: compat 18 | |||||
* | | radio: Fixed overlapping register for LED and FPGPIO core | Ashish Chaudhari | 2015-11-24 | 2 | -2/+2 | |
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* | | cmake: Register components earlier | Martin Braun | 2015-11-16 | 8 | -18/+0 | |
| | | | | | | | | | | | | | | | | | | | | All device-specific CMake components are now registered in one place, before the host/lib/ subdirs are sourced. This way, there are no cyclic dependencies. This solves the issue where ENABLE_X300=Off could disable USB, but preserves the fix where ENABLE_X300=Off would still build some X300 codes. | |||||
* | | max287x: assert target_freq | Martin Braun | 2015-10-19 | 1 | -0/+1 | |
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* | | cbx/sbx: Properly initialize ATR registers during init | Ashish Chaudhari | 2015-10-19 | 1 | -0/+3 | |
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* | | cbx/sbx: Sped up initialization by removing LED blinking sequence | Ashish Chaudhari | 2015-10-19 | 1 | -45/+0 | |
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* | | usrp3: Added separete caches for GPIO OUT and ATR IDLE | Ashish Chaudhari | 2015-10-18 | 1 | -5/+39 | |
| | | | | | | | | | | | | - Masking with ATR Disabled deferred to flush - Some dboards like to switch between GPIO and ATR mode and still expect state to be maintained | |||||
* | | fixup! usrp3: Fixed issue where ATR Idle could clobber GPIO out | Ashish Chaudhari | 2015-10-16 | 1 | -4/+4 | |
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* | | Merge branch 'maint' | Ashish Chaudhari | 2015-10-16 | 2 | -4/+37 | |
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| * | e3xx: sysfs: Drop reference when we're done. | Moritz Fischer | 2015-10-14 | 1 | -0/+2 | |
| | | | | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> | |||||
| * | fixup! ad9361: codec manager needs more includes on some platforms | Martin Braun | 2015-10-12 | 1 | -0/+1 | |
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| * | B200: Fix for CODEC loopback test failure | michael-west | 2015-10-12 | 1 | -4/+34 | |
| | | | | | | | | - Add delay after putting CODEC in loopback mode | |||||
| * | b2xx,e3xx,x300: Bumped compat numbers for 3.9.1 UHD release | Ashish Chaudhari | 2015-09-03 | 3 | -4/+4 | |
| | | | | | | | | | | | | | | - b200: compat 11 - b200mini: compat 2 - e300: compat 11 - x300: compat 15 | |||||
| * | b2xx: Removed DCM reset bit (obsolete) | Martin Braun | 2015-09-03 | 2 | -3/+2 | |
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| * | b200mini: Change AD9364 interface timing for new IO design. | Ian Buckley | 2015-09-03 | 1 | -17/+3 | |
| | | | | | | | | Removes all DCM reset codes. | |||||
| * | cores: Corrected scaling_adjustment calculation | Ian Buckley | 2015-09-03 | 4 | -12/+42 | |
| | | | | | | | | | | | | Compensate for headroom required to rotate a signal in the CORDIC. Fixes some CORDIC-related clipping issues, that reduced ENOB to 15 or 14.5 bits. | |||||
| * | b200: fix startup bad USB state detection printout to use endl instead of ↵ | Michael Dickens | 2015-09-02 | 1 | -1/+1 | |
| | | | | | | | | flush to print cleanly. | |||||
* | | fixup! usrp3: Fixed issue where ATR Idle could clobber GPIO out | Ashish Chaudhari | 2015-10-16 | 1 | -1/+1 | |
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* | | b2xx,e3xx,x300: Bumped compat numbers after GPIO ATR refactoring | Ashish Chaudhari | 2015-10-16 | 3 | -4/+4 | |
| | | | | | | | | | | | | | | - b200: compat 12 - b200mini: compat 3 - e300: compat 12 - x300: compat 17 | |||||
* | | Merge branch 'ashish/gpio_atr_redux' into master-staging | Ashish Chaudhari | 2015-10-15 | 21 | -265/+601 | |
|\ \ | | | | | | | | | | | | | | | | Conflicts: host/lib/usrp/cores/CMakeLists.txt host/lib/usrp/x300/x300_impl.hpp | |||||
| * \ | Merge branch 'master' into ashish/gpio_atr_redux | Ashish Chaudhari | 2015-10-15 | 4 | -21/+54 | |
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| * | | | usrp3: Fixed issue where ATR Idle could clobber GPIO out | Ashish Chaudhari | 2015-10-10 | 2 | -10/+21 | |
| | | | | | | | | | | | | | | | | | | | | | | | | - gpio_atr_3000 will not blindly use the mask when writing the ATR and GPIO OUT values. The mask will be ANDed with the value in the ATR Disable register | |||||
| * | | | usrp3: Added more inline comments to gpio_atr_3000 | Ashish Chaudhari | 2015-10-07 | 1 | -5/+31 | |
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| * | | | usrp3: Cleaned up some GPIO ATR constants and types | Ashish Chaudhari | 2015-09-30 | 2 | -13/+32 | |
| | | | | | | | | | | | | | | | | | | | | - Removed implicit type converstions in ATR address passing - Changed magic numbers to named constants | |||||
| * | | | usrp3: Added new GPIO ATR 3000 core | Ashish Chaudhari | 2015-09-29 | 21 | -265/+545 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Refactored GPIO ATR definitions - Added new 3000 core with a more efficient API - Added a separate db_gpio_atr core to control the ATR bus - Ported b2xx, e3xx and x3xx to the new core - Minor cleanup | |||||
* | | | | Merge branch 'master' into x300/dram | Ashish Chaudhari | 2015-10-15 | 6 | -31/+64 | |
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| * | | | UBX: Support for Integer-N mode step size control | michael-west | 2015-10-15 | 1 | -17/+46 | |
| | | | | | | | | | | | | | | | | - Also checks for invalid int_n_step values. | |||||
| * | | | b200: Updated minimum clock rate to match DCM changes | Martin Braun | 2015-10-14 | 3 | -4/+8 | |
| |/ / | | | | | | | | | | | | | | | | Lowest master clock rate is now 220 kHz. At low clock rates, the convergence time for the DC offset and quadrature calibration times is much larger, though. |