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| * uhd: Fixed logging bug (#476) -- UHD logging has unexplained effect on packet...michael-west2014-09-241-8/+0
| * sbx: Fixed logging string (showed TX instead of RX)Martin Braun2014-09-241-1/+1
* | Merge branch 'maint'Martin Braun2014-09-234-9/+6
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| * usrp: don't print duplicate GPSDO detection messagesNicholas Corgan2014-09-233-6/+1
| * cbx: Fixed LO FRAC truncationMartin Braun2014-09-231-4/+6
* | b200: Set sensible defaults for freq, gain and rate at startupMartin Braun2014-09-022-5/+19
* | ad9361: Made recommended rate a constantMartin Braun2014-09-023-3/+4
* | Give user the option to ignore daughterboard's calibration file at runtimeNicholas Corgan2014-09-028-11/+35
* | Added missing pure virtual destructors to base classesNicholas Corgan2014-09-0162-62/+269
* | Merge branch 'maint'Martin Braun2014-09-011-1/+1
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| * x300_dboard_iface: added UHD_UNUSED() macro to unused parameters in set_clock...Nicholas Corgan2014-08-291-1/+1
* | uhd: Changed line endings from Windows -> UNIXAshish Chaudhari2014-08-212-2039/+2039
* | ad9361: Output PLL lock status on ctrl output pins.Ashish Chaudhari2014-08-211-1/+1
* | b100: More RX buffersMartin Braun2014-08-211-1/+2
* | Merge branch 'master' into ashish/cat_refactor_phase2Ashish Chaudhari2014-08-206-57/+43
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| * | Merge branch 'maint'Martin Braun2014-08-186-57/+43
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| | * Bumping FPGA compat to 7.michael-west2014-08-181-1/+1
| | * Changed analog delay on DAC reference and radio clocks from 1075ps to 900psmichael-west2014-08-181-4/+4
| | * - Fixes for channel alignmentmichael-west2014-08-185-56/+42
* | | ad9361: Fixed MSVC build issuesAshish Chaudhari2014-08-132-2034/+2039
* | | ad9361: Fixed debug messages with UHD_LOGsAshish Chaudhari2014-08-131-19/+15
* | | ad9361: Fixed TX direction bug in ad9361_ctrlAshish Chaudhari2014-08-131-1/+1
* | | ad9361: Added synchronization to IO and device classesAshish Chaudhari2014-08-133-20/+36
* | | ad9361: Cleaned up constants and macrosAshish Chaudhari2014-08-134-84/+67
* | | ad9361: Cleaned up errors and debug messagesAshish Chaudhari2014-08-121-45/+46
* | | ad9361: Converted stdint types to boost typesAshish Chaudhari2014-08-127-136/+133
* | | ad9361: Renamed ad9361_impl.c to ad9361_device.cppAshish Chaudhari2014-08-122-6/+1
* | | b200, ad9361: Cleanup up AD9361 driverAshish Chaudhari2014-08-1213-1553/+1122
* | | b200: Removed all AD9361 related firmwareAshish Chaudhari2014-08-123-85/+1
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* | Merge branch 'master' into ashish/cat_refactor_masterAshish Chaudhari2014-08-054-11/+35
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| * | Merge branch 'maint'Martin Braun2014-07-314-11/+35
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| | * Merge branch 'maint' into uhd/bug492michael-west2014-07-307-49/+167
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| | | * tx fe corrections: fixing mixed tabs / spaces, other horrible whitespace cruftBen Hilburn2014-07-252-14/+11
| | | * Merge 'maint' into x300/bug513Ben Hilburn2014-07-252-3/+4
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| | | * | X300: Added UHD support for TX FEIan Buckley2014-07-182-1/+14
| | * | | Fix for BUG #492: UHD: set_time_unknown_pps() fails with GPSDO installedmichael-west2014-06-253-3/+17
* | | | | b200: Added variable rate SPI core for AD9361 and ADF4001Ashish Chaudhari2014-08-018-8/+159
* | | | | b200: Moved AD9361 driver to hostAshish Chaudhari2014-08-0118-131/+2872
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* | | / OctoClock firmware upgrade, added host driverNicholas Corgan2014-07-237-11/+17
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* | | Commented out warning if X300 reference clock fails to lock within 1 second d...michael-west2014-07-221-2/+3
* | | Fix for BUG #517: B200: Regression of power level on RXmichael-west2014-07-221-1/+1
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* | Updated copyright year.michael-west2014-07-171-1/+1
* | Fix for BUG #469michael-west2014-07-171-0/+2
* | - Changed variables from uint8_t to uint32_t so parsing of hex strings would ...michael-west2014-07-171-3/+3
* | Addressing comments from review.michael-west2014-07-172-15/+21
* | Fix for BUG #469: Bad/Empty GPS NMEA strings returned when the queries are m...michael-west2014-07-172-20/+108
* | Merge branch 'origin/b200/bug516' into maintBen Hilburn2014-07-171-4/+4
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| * | BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-07-101-1/+1
| * | Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-06-181-3/+3
| * | Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-06-181-3/+3
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