| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | b200: Removed all AD9361 related firmware | Ashish Chaudhari | 2014-08-12 | 3 | -85/+1 |
| | | | | | | | | - FX3 does not respond to AD9361 firmware transaction VREQs - FX3 does not respond to AD9361 SPI transaction VREQs - Deleted all AD9361 firmware files - Bumped FW compat to 6 | ||||
| * | Merge branch 'master' into ashish/cat_refactor_master | Ashish Chaudhari | 2014-08-05 | 4 | -11/+35 |
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| | * | Merge branch 'maint' | Martin Braun | 2014-07-31 | 4 | -11/+35 |
| | |\ | | | | | | | | | | | | | Conflicts: host/utils/usrp_burn_mb_eeprom.cpp | ||||
| | | * | Merge branch 'maint' into uhd/bug492 | michael-west | 2014-07-30 | 7 | -49/+167 |
| | | |\ | | | | | | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.cpp | ||||
| | | | * | tx fe corrections: fixing mixed tabs / spaces, other horrible whitespace cruft | Ben Hilburn | 2014-07-25 | 2 | -14/+11 |
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| | | | * | Merge 'maint' into x300/bug513 | Ben Hilburn | 2014-07-25 | 2 | -3/+4 |
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| | | | * | | X300: Added UHD support for TX FE | Ian Buckley | 2014-07-18 | 2 | -1/+14 |
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| | | * | | | Fix for BUG #492: UHD: set_time_unknown_pps() fails with GPSDO installed | michael-west | 2014-06-25 | 3 | -3/+17 |
| | | | | | | | | | | | | | | | | | | | | | - Added polling for PPS time change after setting time from GPSDO. | ||||
| * | | | | | b200: Added variable rate SPI core for AD9361 and ADF4001 | Ashish Chaudhari | 2014-08-01 | 8 | -8/+159 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | - Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz | ||||
| * | | | | | b200: Moved AD9361 driver to host | Ashish Chaudhari | 2014-08-01 | 18 | -131/+2872 |
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow | ||||
| * | | / | OctoClock firmware upgrade, added host driver | Nicholas Corgan | 2014-07-23 | 7 | -11/+17 |
| | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | * OctoClock can communicate with UHD over Ethernet * Can read NMEA strings from GPSDO and send to host * Added multi_usrp_clock class for clock devices * uhd::device can now filter to return only USRP devices or clock devices * New OctoClock bootloader can accept firmware download over Ethernet * Added octoclock_burn_eeprom,octoclock_firmware_burner utilities * Added test_clock_synch example to show clock API | ||||
| * | | | Commented out warning if X300 reference clock fails to lock within 1 second ↵ | michael-west | 2014-07-22 | 1 | -2/+3 |
| | | | | | | | | | | | | | during initialization. Sometimes it takes longer and that is OK. | ||||
| * | | | Fix for BUG #517: B200: Regression of power level on RX | michael-west | 2014-07-22 | 1 | -1/+1 |
| | |/ |/| | | | | | - Fixed scalar for RX DSP core | ||||
| * | | Updated copyright year. | michael-west | 2014-07-17 | 1 | -1/+1 |
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| * | | Fix for BUG #469 | michael-west | 2014-07-17 | 1 | -0/+2 |
| | | | | | | | | | - Added mutex for write_uart() | ||||
| * | | - Changed variables from uint8_t to uint32_t so parsing of hex strings would ↵ | michael-west | 2014-07-17 | 1 | -3/+3 |
| | | | | | | | | | work properly. | ||||
| * | | Addressing comments from review. | michael-west | 2014-07-17 | 2 | -15/+21 |
| | | | | | | | | | | | | | - Corrected types of some variables to be boost types. - Removed debugging code accidentally left in. - Changed some compiled out error messages to log messages. | ||||
| * | | Fix for BUG #469: Bad/Empty GPS NMEA strings returned when the queries are ↵ | michael-west | 2014-07-17 | 2 | -20/+108 |
| | | | | | | | | | | | | | | | | | | | made in a random wait iterative fashion Fix for BUG #460: X300: GPGGA sensor most often empty, while RMC is usually OK - Added checksum verification of NMEA strings - Improved handling of short or malformed strings - Fixed GPSDO data synchronization between X300 firmware and host | ||||
| * | | Merge branch 'origin/b200/bug516' into maint | Ben Hilburn | 2014-07-17 | 1 | -4/+4 |
| |\ \ | | | | | | | | | | Fixing B200 clock rate float compare. | ||||
| | * | | BUG #516: B210: Fails to Run with 30.72 MHz Clock | michael-west | 2014-07-10 | 1 | -1/+1 |
| | | | | | | | | | | | | | - Addressed feedback from review. | ||||
| | * | | Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clock | michael-west | 2014-06-18 | 1 | -3/+3 |
| | | | | | | | | | | | | | - Corrected clock rate checks for B2x0 | ||||
| | * | | Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clock | michael-west | 2014-06-18 | 1 | -3/+3 |
| | |/ | | | | | | | - Corrected clock rate checks for B2x0 | ||||
| * | | Merge branch 'origin/ashish/rx_pcie_overflows' into maint | Ben Hilburn | 2014-07-17 | 2 | -3/+7 |
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| | * | | x300: Bugfix for overflows on PCIe at 200MS/s | Ashish Chaudhari | 2014-06-27 | 2 | -3/+7 |
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| * | | Merge branch 'origin/b200/bug512' into maint | Ben Hilburn | 2014-07-17 | 1 | -9/+15 |
| |\ \ | | | | | | | | | | B200 now creates internal PPS. Depends on FPGA change. | ||||
| | * | | Enhancement #512: B210: Need an Internal PPS | michael-west | 2014-06-13 | 1 | -9/+15 |
| | | | | | | | | | | | | | - Added support for internal PPS selection (set as default) | ||||
| * | | | Fix for BUG #527: N200: 50 Msps results in two tones | michael-west | 2014-07-01 | 1 | -1/+2 |
| | |/ |/| | | | | | - Adjusted check to enable first half-band filter only if the rate is decimated enough between the CIC and other half-band filter | ||||
| * | | Merge branch 'origin/b200/bug500' into maint - Fixing B200 phase alignment issue | Ben Hilburn | 2014-06-16 | 3 | -3/+9 |
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| | * | - Changed XOR to OR for REG_DSP_RX_MUX flags. | michael-west | 2014-06-12 | 1 | -3/+3 |
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| | * | Fix for BUG #500: B210: RX channels are not phase aligned | michael-west | 2014-06-06 | 3 | -3/+9 |
| | | | | | | | | | - Adding UHD side code to invert second RX channel | ||||
| * | | Lots of bit-specific type work to fix compilation on older OSes. | Ben Hilburn | 2014-05-21 | 4 | -15/+15 |
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| * | x300: adding include to fix builds on older systems | Ben Hilburn | 2014-05-20 | 1 | -0/+1 |
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| * | Fixing Bug #473 - Autoselection of VCO Frequency in DBSRX2 | Ben Hilburn | 2014-05-20 | 1 | -6/+8 |
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| | * | Fixed whitespace and added comment. | michael-west | 2014-05-20 | 1 | -5/+6 |
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| | * | Fix for BUG 473: UHD: DBSRX2 VCO Autoselect Failing / Wrong Frequency Range | michael-west | 2014-05-13 | 1 | -3/+4 |
| | | | | | | | | | | | - Corrected frequency range for DBSRX2 - Corrected register write order when changing frequency | ||||
| * | | Fix for BUG 456: LED TX/RX colors backwards on X300 | michael-west | 2014-05-16 | 1 | -2/+2 |
| |/ | | | | - Corrected bit masks so TX will light the red LED and RX will light the green LED | ||||
| * | Merge branch 'origin/martin/multi_usrp/bug_dc_offset' into maint | Ben Hilburn | 2014-05-08 | 1 | -5/+25 |
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| | * | multi_usrp: Throws warnings for some tree props | Martin Braun | 2014-05-05 | 1 | -5/+25 |
| | | | | | | | | | | | | | | | Until now, multi would simply access some property and assume it exists. A call for set_tx_dc_offset() on a B210 would thus throw errors. This checks for B-series-only leaf nodes before doing anything and displays a warning instead. | ||||
| * | | BUG #460: X300: GPGGA sensor most often empty, while RMC is usually OK | michael-west | 2014-05-06 | 1 | -1/+8 |
| | | | | | | | | | | | | | - It was found that strings containing only a newline character were being returned by N-series and X-series devices. - Added better handling of strings received under 6 bytes. - Added erasing of end of line characters. | ||||
| * | | usrp2: fixed usrp2_card_burner.py and usrp_n2xx_simple_net_burner paths in ↵ | Nicholas Corgan | 2014-05-06 | 2 | -4/+17 |
| |/ | | | | incompatibility error messages | ||||
| * | x300: Bumped FPGA compat number to 6. | Ashish Chaudhari | 2014-04-28 | 1 | -1/+1 |
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| * | x300: Changed bus_clk frequency to 166.67MHz. | Ashish Chaudhari | 2014-04-28 | 1 | -1/+1 |
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| * | x300: Bumped FPGA compat number to 5. | Ashish Chaudhari | 2014-04-25 | 1 | -1/+1 |
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| * | x300: Addressed review feedback | Ashish Chaudhari | 2014-04-25 | 1 | -11/+13 |
| | | | | | | - Fixed synchronization for unclaim - Removed stray RIO addr space set | ||||
| * | x300: Added synchronization between device claiming and checking. | Ashish Chaudhari | 2014-04-24 | 2 | -5/+40 |
| | | | | | | - We now maintain a registry of pcie ZPU transports - Added static mutex for claimer | ||||
| * | x300: Added hardware flush mechanism to PCIe logic. | Ashish Chaudhari | 2014-04-24 | 1 | -2/+8 |
| | | | | | | - Added DMA enabled states to DMA logic to allow for hardware data flushing during init. - niusrprio_session will now check for FPGA busy before downloading | ||||
| * | Merge branch 'origin/uhd/issue_448_itemsize' into maint | Ben Hilburn | 2014-04-21 | 1 | -1/+1 |
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| | * | multi_usrp: Fixed bug which caused unspecified OTW-format to crash apps | Martin Braun | 2014-04-15 | 1 | -1/+1 |
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| * | | x300: removing intelligent PPS detection until further development | Ben Hilburn | 2014-04-15 | 1 | -1/+2 |
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| * | Merge branch 'origin/ncorgan/tvrx2_fix' | Ben Hilburn | 2014-04-10 | 1 | -3/+3 |
| |\ | | | | | | | Fix bug with regard to TVRX2 refclock dividers. | ||||
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