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* usrp_e100: init the subdev specs before calling io_initJosh Blum2011-06-141-3/+4
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* uhd: update packet handlers when the clock rate is changedJosh Blum2011-06-143-0/+3
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* usrp_e100: super packet handler support squashedJosh Blum2011-06-143-48/+65
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* usrp1: super packet handler support squashedJosh Blum2011-06-145-98/+98
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* usrp2: super packet handler support squashedJosh Blum2011-06-143-218/+77
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* N210: stop sending 1 char at a time to the GPSDONick Foster2011-06-141-1/+1
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* usrp1: moved fx2 control into its own directoryJosh Blum2011-06-149-25/+52
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* B100/USRP1: fix bug where fpga size div by 64 resulted in never finishing loadNick Foster2011-06-101-0/+1
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* uhd: added more SAFE_CALL macros to hardware wrapper dtorsJosh Blum2011-06-106-36/+20
| | | | And removed the calls on the sptr resets (not needed now).
* uhd: added safe call on a few dboard related deconstructorsJosh Blum2011-06-103-3/+6
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* usrp-e100: fix message typo, its master_clock_rateJosh Blum2011-06-091-1/+1
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* wbx: mixers always enabled, ant switches always definedJosh Blum2011-06-022-7/+6
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* usrp2: catch exceptions thrown in locker loop (like the user unplugs device)Josh Blum2011-06-011-4/+12
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* WBX: keep mixer on when TX idle, and switch TX ant sw to RX when idle to ↵Nick Foster2011-05-262-2/+2
| | | | | | keep mixer from feeding out when idle. This allows USRPs to maintain a constant phase relationship between MIMO devices while operating.
* Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdprivNick Foster2011-05-232-3/+15
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| * usrp-e100: set_ignore_sync_fpga_plus_codecJosh Blum2011-05-201-2/+14
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| * usrp2: turn on ups_per_sec to avoid timeout issues on low sample ratesJosh Blum2011-05-201-1/+1
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* | N210: changes for rev 4 supportNick Foster2011-05-187-5/+55
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* Merge branch 'master' into release_workrelease_003_001_000Josh Blum2011-05-173-42/+37
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| * USRP1: implement MBOARD_PROP_CLOCK_CONFIG, only accepts internalJosh Blum2011-05-162-2/+11
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| * E100: fix aux codec ADC reads as per USRP1 in 6f70d1Nick Foster2011-05-161-40/+26
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* | usrp2: moved register map into #defines, entries for new dsp frontendJosh Blum2011-05-179-389/+174
| | | | | | | | also fixes irq rb
* | Merge branch 'master' into release_workJosh Blum2011-05-1615-144/+2066
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| * uhd: replace managed buffer shared pointer w/ intrusive pointer to reduce ↵Josh Blum2011-05-142-25/+6
| | | | | | | | overhead
| * usrp1: correct TX codec rate, it should also read 64e6 when probedJosh Blum2011-05-142-17/+11
| | | | | | | | | | | | We were using clock_rate*2 to simulate a codec rate of 128MHz. This reflected the old gnuradio API, but the rate between FPGA and codec is really 64MHz for both rx and tx directions.
| * usrp1: apply conditional disables/enables to rx and txJosh Blum2011-05-147-9/+60
| | | | | | | | | | | | | | | | Scapped the old gnuradio code for information about VRQ_FPGA_SET_XX_ENABLE. It turns out that we should disabled + restore state when changing muxes or rates. The USRP seems to stream properly when receiving single and dual channel. Prior to this commit, tx was accicentally always disabled from a few commits ago.
| * Merge branch 'tvrx2'Josh Blum2011-05-132-0/+1912
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| | * Added TVRX2 supportJason Abele2011-05-132-0/+1912
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| * | usrp-e100: use misc test32 register to store fpga hashJosh Blum2011-05-101-36/+34
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| * usrp-e100: created device address arg for master clock rate, removed eeprom hackJosh Blum2011-05-125-53/+13
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| * usrp-e100: added soft sync for ad9522 clock controlJosh Blum2011-05-091-2/+12
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| * usrp_e100: work w/ ad9522 clock configurationJosh Blum2011-05-081-2/+18
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* | Merge branch 'use_vita_length' into nextJosh Blum2011-05-161-1/+1
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| * | usrp-e100: incremented compat # to 4 for vita length changeJosh Blum2011-05-161-1/+1
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* | | usrp2: device locking, use gpid so the process cant lock itself outJosh Blum2011-05-111-1/+37
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* | | Merge branch 'master' into nextJosh Blum2011-05-1133-374/+352
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| * usrp1: overload read_eeprom to handle multi-byte readsJosh Blum2011-05-052-1/+11
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| * usrp1: added more logging to usrp1 iface for debuggingJosh Blum2011-05-051-0/+20
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| * uhd: various tweaks to log and msg, replaced a few remaining stdioJosh Blum2011-05-044-1/+4
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| * uhd: removed more iostream stuff from usrp* implementationsJosh Blum2011-05-0416-108/+99
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| * usrp-e100: removed stdio prints from implementationJosh Blum2011-05-047-80/+86
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| * uhd: replaced warning post with calls to UHD_MSG(warning)Josh Blum2011-05-0414-90/+55
| | | | | | | | | | The message api can support warnings, error, and status messages. The default handler is to stdio, but the user can change this.
| * uhd: replaced many conditional prints with UHD_LOG usageJosh Blum2011-05-042-13/+11
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| * usrp: replaced conditional dboard debug prints w/ UHD_LOGV(often)Josh Blum2011-05-048-83/+68
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* | Merge branch 'master' into nextJosh Blum2011-05-0310-55/+192
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| * usrp2: added REF_MIMO and PPS_MIMO for USRP2 clock configJosh Blum2011-05-031-15/+23
| | | | | | | | | | | | | | | | | | Basically, one can tell a MIMO master to lock to MIMO ref and/or time. This is an alternative to the mimo_mode=slave/master device args. When using this alternative, one should always set the mimo_mode to maser. When in master mode, any clock config settings can be used. When in slave mode, the clock config setting are forced to MIMO_REF/PPS
| * Added RSSI sensor for RFX series (not rfx400)Jason Abele2011-05-021-6/+29
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| * usrp1: toggle the FPGA reset and RX reset registers at initJosh Blum2011-05-011-8/+18
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| * usrp-e100: shrink name field to git mcr into eepromJosh Blum2011-04-201-2/+3
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| * USRP1: added support for setting clock rate from EEPROMJosh Blum2011-05-014-8/+56
| | | | | | | | | | Basically, same deal as the previous changeset but for USRP1. Modified previous changes so that the key is shorter (mcr = master_clock_rate)
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