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* uhd: mpm: apply clang-format to all filesBrent Stapleton2019-01-161-114/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Applying formatting changes to all .cpp and .hpp files in the following directories: ``` find host/examples/ -iname *.hpp -o -iname *.cpp | \ xargs clang-format -i -style=file find host/tests/ -iname *.hpp -o -iname *.cpp | \ xargs clang-format -i -style=file find host/lib/usrp/dboard/neon/ -iname *.hpp -o -iname *.cpp | \ xargs clang-format -i -style=file find host/lib/usrp/dboard/magnesium/ -iname *.hpp -o -iname *.cpp | \ xargs clang-format -i -style=file find host/lib/usrp/device3/ -iname *.hpp -o -iname *.cpp | \ xargs clang-format -i -style=file find host/lib/usrp/mpmd/ -iname *.hpp -o -iname *.cpp | \ xargs clang-format -i -style=file find host/lib/usrp/x300/ -iname *.hpp -o -iname *.cpp | \ xargs clang-format -i -style=file find host/utils/ -iname *.hpp -o -iname *.cpp | \ xargs clang-format -i -style=file find mpm/ -iname *.hpp -o -iname *.cpp | \ xargs clang-format -i -style=file ``` Also formatted host/include/, except Cpp03 was used as a the language standard instead of Cpp11. ``` sed -i 's/ Cpp11/ Cpp03/g' .clang-format find host/include/ -iname *.hpp -o -iname *.cpp | \ xargs clang-format -i -style=file ``` Formatting style was designated by the .clang-format file.
* x300: Add support for USRP-2974Thomas Vogel2018-12-141-0/+1
| | | | | This will enable a USRP 2974 to be registered as an X300 device. Its product ID is 'NI-2974'.
* UBX: Add support for phase synchronization at LTE clock ratesMichael West2018-07-171-0/+12
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* uhd: Update license headersMartin Braun2018-02-191-1/+2
| | | | | | | All copyright is now attributed to "Ettus Research, a National Instruments company". SPDX headers were also updated to latest version 3.0.
* Move all license headers to SPDX format.Martin Braun2017-12-221-12/+1
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* X300: Prevent MB EEPROM Corruptionmichael-west2017-01-101-0/+3
| | | | | | | - Load EEPROM data into firmware memory to access from there instead of driving the I2C bus directly - Fixed firmware performance issues by removing the popcntll() function and reducing frequency of background tasks to once every 10ms - Added x300_mb_eeprom_iface to handle cases of devices with older and newer firmware - Added checks for claim to device before driving the I2C bus
* Remove all boost:: namespace prefix for uint32_t, int32_t etc. (fixed-width ↵Martin Braun2016-11-081-3/+3
| | | | | | | | types) - Also removes all references to boost/cstdint.hpp and replaces it with stdint.h (The 'correct' replacement would be <cstdint>, but not all of our compilers support that).
* Added NI product IDs for USRP-2945 and USRP-2955vkakade2016-09-201-0/+2
| | | | These are USRP RIO (X310) devices with TwinRX daughter-boards.
* x3xx: Enable readback of fpga_version_hashMoritz Fischer2016-08-091-2/+1
| | | | | | | | | | | | | | | This adds a feature that is already present in e3xx and n230 products allowing to read back the fpga git hash the current image has been built from. The value is available via property tree at: /mboards/0/fpga_version_hash Note: A compatibility number bump is required, as otherwise the register will always read back 0 Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
* Merging RFNoC support for X310Martin Braun2016-08-091-78/+1
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* x300: UHD is now compatible with FPGA images with Aurora supportAshish Chaudhari2016-07-071-20/+22
| | | | | - UHD and ZPU is now aware of Aurora SFP+ transceivers in the FPGA image - Added script to exercise Aurora BIST features
* Merge branch 'maint'Ashish Chaudhari2015-12-151-0/+2
|\ | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.hpp host/lib/usrp/e300/e300_fpga_defs.hpp host/lib/usrp/x300/x300_fw_common.h
| * E300/X300: Add VITA time synchronization on internal signalmichael-west2015-12-101-0/+2
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* | radio: Fixed overlapping register for LED and FPGPIO coreAshish Chaudhari2015-11-241-1/+1
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* | x300: Added DMA FIFO support to X300Ashish Chaudhari2015-09-161-0/+4
|/ | | | | - Added HG vs HGS detection logic - Added DMA FIFO configuration code
* Merge branch 'master' into ashish/register_apiAshish Chaudhari2015-08-101-30/+37
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| * x300, e300: Moved common register names to radio namespaceMartin Braun2015-08-071-28/+35
| | | | | | | | This preps the code for merging common registers altogether.
* | x300: Used new soft register API for X300 registersAshish Chaudhari2015-08-041-16/+93
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* x300: Removed radio_rst assertion codeAshish Chaudhari2015-07-231-0/+1
| | | | | | - radio_rst was being asserted to reset the capture iface IDELAYs but that was excessive and had adverse effects on the rest of the radio - Replaced radio_rst with a localized IDELAYCTRL reset
* x300: Added a comprehensive radio reset sequenceAshish Chaudhari2015-07-221-5/+12
| | | | | | | | | | | - Everytime the LMK is configured, we do the following: - Reset all LMK regs - Wait for LMK lock - Reset radio_clk PLL in FPGA - Wait for FPGA PLL to lock - Assert radio_rst which resets downstream radio logic - This address the intermittent self-cal failures due to uncalibrated IDELAY taps - Bumped FPGA compat to 12
* x300: Addressed code review feedback for Rev7+ supportAshish Chaudhari2015-07-201-34/+34
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* x300: Added new Rev7+ X3x0 MB product codesAshish Chaudhari2015-07-181-0/+18
| | | | | - Added new PCIe and MB PIDs for new boards - Added an error if MB PID is invalid
* x300: Added self-cal to tune ADC clk delay at startupAshish Chaudhari2015-07-011-0/+1
| | | | | | | | - Self-calibration routine steps through various values of LMK delay to detect metastability in the SSCLK -> radio_clk crossing and computes an ideal delay for the ADC clock. - Self calibration is triggered at startup if the self_cal_adc_delay device arg is specified
* revert unnecessary change to the SR_LEDSBrooks Prumo2015-01-051-1/+1
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* x300: support new 120 MHz bandwidth versions of the NI-branded X310sBrooks2014-12-221-67/+73
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* e300,x300: Moved LED register space as not to overlap w/ GPIOsAshish Chaudhari2014-12-161-1/+1
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* x300: adding include to fix builds on older systemsBen Hilburn2014-05-201-0/+1
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* x300: Added hardware flush mechanism to PCIe logic.Ashish Chaudhari2014-04-241-2/+8
| | | | | - Added DMA enabled states to DMA logic to allow for hardware data flushing during init. - niusrprio_session will now check for FPGA busy before downloading
* - Fix for BUG #264: ./test_pps_input --source external passes even with no 1 ↵Michael West2014-02-181-0/+14
| | | | | | | | | | PPS on external input on X3xx - Fixed behavior of PPS and clock references to be consistent and intuitive. -- Added detection of clock reference and PPS. -- Changed order of precedence to external, gpsdo, internal for default of clock and PPS. -- Throws runtime error if the user requests a reference clock or PPS that is not present. - Bumped FPGA compatibility to 4.
* Merging USRP X300 and X310 support!!Ben Hilburn2014-02-041-0/+152
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