uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	Merge branch 'maint'	Martin Braun	2015-04-10	1	-2/+2
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\| *	Increase command FIFO depth of N2x0 and X3x0 to 64.	michael-west	2015-04-10	1	-2/+2
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* \|	Merge branch 'maint'	Martin Braun	2015-04-06	1	-0/+1
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\| *	uhd: Add ability to get and set command time through dboard_iface.	michael-west	2015-04-03	1	-0/+1
\| \| \| \| \| \| \| \| \| \|	This creates a wb_iface child class called timed_wb_iface, which adds support for timed commands.
\| *	x300: Cleaned up DAC ctrl and clock init logic	Ashish Chaudhari	2014-11-06	1	-2/+10
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	- DAC: Squashed configuration into 2 main operations: reset and reset_and_resync - DAC: Put in sleep mode during configuration - DAC: Synchronize only if streaming to more than one DAC - DAC: Use falling edge sync mode - DAC: Fixed power up/down settings - DAC: Frontend sync failure is fatal - Clocks: Refactored clock source change logic - Clocks: Cleaned up init and lock-check sequence
* \|	B200: UHD support for FPGPIO connector on REV6+ boards.	Ian Buckley	2015-03-09	1	-3/+3
\| \| \| \| \| \| \| \| \| \| \| \|	- GPIO on UART connector all board Revs - Consolidated fpgpio_bitbang into fpgpio example and renamed it gpio - Changed FP_GPIO readback address to match X300
* \|	x300: Cleaned up DAC ctrl and clock init logic	Ashish Chaudhari	2014-11-13	1	-2/+10
\|/ \| \| \| \| \| \| \| \| \| \|	- DAC: Squashed configuration into 2 main operations: reset and reset_and_resync - DAC: Put in sleep mode during configuration - DAC: Synchronize only if streaming to more than one DAC - DAC: Use falling edge sync mode - DAC: Fixed power up/down settings - DAC: Frontend sync failure is fatal - Clocks: Refactored clock source change logic - Clocks: Cleaned up init and lock-check sequence
*	x300,nirio: Added support for NI-RIO 14.0	Ashish Chaudhari	2014-10-10	1	-1/+1
\| \| \| \| \| \| \| \| \|	- Split niriok_proxy interfaces to support NI-RIO <=13.0 and >=14.0 kernel interfaces - Fixed multi-session race conditions by synchronizing niriok_proxy access - Fixed bug switching from NI LV-FPGA access to UHD access by changing how devices are hashed into a reservation table - Fixed calculation of FRAC values for CBX and SBX LO tuning by rounding instead of truncating - Fixed bug that was not setting two MSBs for band select configuration of CBX LO - Submitting on behalf of Patrick Sisterhen, Matthew Crymble
*	x300: Reduced the TX buffer from 576K to 520K	Ashish Chaudhari	2014-10-09	1	-1/+1
\| \| \| \| \|	- Trading performance for stability. This helps meet timing at the cost of a shorter processing time window between sends. - Bumped FPGA compat number to 8
*	Merge branch 'maint'	Martin Braun	2014-09-25	1	-0/+2
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\| *	x300: added reset and resync of ADCs and DACs when changing reference clock	michael-west	2014-09-25	1	-0/+2
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* \|	Give user the option to ignore daughterboard's calibration file at runtime	Nicholas Corgan	2014-09-02	1	-0/+1
\|/ \| \| \| \|	* Add "ignore-cal-file" to the uhd::device_addr_t arguments * Added documentation for new feature
*	tx fe corrections: fixing mixed tabs / spaces, other horrible whitespace cruft	Ben Hilburn	2014-07-25	1	-1/+1
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*	X300: Added UHD support for TX FE	Ian Buckley	2014-07-18	1	-0/+2
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*	x300: Bugfix for overflows on PCIe at 200MS/s	Ashish Chaudhari	2014-06-27	1	-1/+5
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*	Lots of bit-specific type work to fix compilation on older OSes.	Ben Hilburn	2014-05-21	1	-2/+2
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*	x300: Changed bus_clk frequency to 166.67MHz.	Ashish Chaudhari	2014-04-28	1	-1/+1
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*	x300: Added synchronization between device claiming and checking.	Ashish Chaudhari	2014-04-24	1	-0/+1
\| \| \| \| \|	- We now maintain a registry of pcie ZPU transports - Added static mutex for claimer
*	x300: Added max link rate info	Martin Braun	2014-04-10	1	-0/+4
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*	x300: Fix the assumed max header size	Martin Braun	2014-03-28	1	-0/+9
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*	Modified reference clock lock check to only be performed on Rev E or later.	michael-west	2014-03-17	1	-0/+2
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*	Merge clock and PPS fixes.	Ben Hilburn	2014-03-15	1	-5/+7
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\| *	Addressed comments from review.	michael-west	2014-03-15	1	-5/+6
\| \| \| \| \| \| \| \| \| \| \| \|	- Fixed typos. - Renamed reset() to reset_clocks(). - Created wait_for_ref_locked() function.
\| *	- Fix for BUG #264: ./test_pps_input --source external passes even with no 1 ↵	Michael West	2014-02-18	1	-0/+1
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	PPS on external input on X3xx - Fixed behavior of PPS and clock references to be consistent and intuitive. -- Added detection of clock reference and PPS. -- Changed order of precedence to external, gpsdo, internal for default of clock and PPS. -- Throws runtime error if the user requests a reference clock or PPS that is not present. - Bumped FPGA compatibility to 4.
* \|	Merge Ethernet, MTU, and frame size fixes.	Ben Hilburn	2014-03-14	1	-1/+1
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\| * \|	x300 mtu: Removed magic number, minor manual updates	Martin Braun	2014-02-18	1	-1/+1
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* \|	x300: added channel mapping capabilities	Martin Braun	2014-03-10	1	-5/+25
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* \|	x300: merged subdev update routines for tx and rx	Martin Braun	2014-03-10	1	-2/+7
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* \|	x300: remove data that was duplicating property tree	Martin Braun	2014-03-10	1	-4/+0
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*	Pushing the bulk of UHD-3.7.0 code.	Ben Hilburn	2014-02-14	1	-20/+31
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*	Merging USRP X300 and X310 support!!	Ben Hilburn	2014-02-04	1	-0/+306