| Commit message (Collapse) | Author | Age | Files | Lines |
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This proved helpful on devices where the EEPROM is wrong about hardware
revision, and the EEPROM writing doesn't work, because the ADC self-test
fails due to being run for the wrong board revision.
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- If there were duplicate IPs in the mboard eeprom, the last one would be selected instead of the first
- The default IP addresses (used for the case where the mboard eeprom can't be read) would overwrite the previous settings
- Added a warning for duplicate IP entries in the mboard eeprom
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- This change ensures that the smallest frame size is chosen with dual ethernet
- It helps avoid any issues with using frame sizes larger than what the smaller link supports
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- Fixed an issue where 10GE on the HGS image presented a false warning for the link capacity
- Removed some unnecessary variables after cleanup
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Conflicts:
host/lib/usrp/cores/gpio_core_200.cpp
host/lib/usrp/dboard/db_ubx.cpp
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- Disabled MAX2871 VCO auto selection for phase sync
- Added checks for new phase sync constraints recently published by Maxim
- Added dboard_clock_rate option for X300
- Adjusted timing of SYNC signal relative to dboard referenc clock
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- Moved dboard iface initialization to dboard_manager
- Added a restricted register function. Restricted dboards
don't expose their control iface in the property tree
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- Added desired and coerced values and accessors to property
- Added support to register desired subscribers
- set APIs don't reallocate storage for a property value
- Renamed callback method registration APIs
- Registering 2 coercers or publishers for a property will throw
- Registering a coercer and a publisher for the same property will throw
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Conflicts:
host/lib/usrp/b200/b200_impl.hpp
host/lib/usrp/e300/e300_fpga_defs.hpp
host/lib/usrp/x300/x300_fw_common.h
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Compensate for headroom required to rotate a signal in
the CORDIC. Fixes some CORDIC-related clipping issues,
that reduced ENOB to 15 or 14.5 bits.
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Conflicts:
host/lib/usrp/cores/CMakeLists.txt
host/lib/usrp/x300/x300_impl.hpp
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- Refactored GPIO ATR definitions
- Added new 3000 core with a more efficient API
- Added a separate db_gpio_atr core to control the ATR bus
- Ported b2xx, e3xx and x3xx to the new core
- Minor cleanup
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- Added HG vs HGS detection logic
- Added DMA FIFO configuration code
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Compensate for headroom required to rotate a signal in
the CORDIC. Fixes some CORDIC-related clipping issues,
that reduced ENOB to 15 or 14.5 bits.
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- It's status is thrown away anyway
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- Included list header in soft_reg header
- Fixed typo in x300_impl
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This preps the code for merging common registers altogether.
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The old code used a non standard (though very common) way
to determine the size of an array.
In order to avoid warnings, pass another parameter to indicate
the size.
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
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- radio_rst was being asserted to reset the capture iface IDELAYs but
that was excessive and had adverse effects on the rest of the radio
- Replaced radio_rst with a localized IDELAYCTRL reset
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- The following function implementations were moved from x300_impl.cpp
to x300_adc_dac_utils.cpp
- synchronize_dacs
- self_test_adcs
- extended_adc_test
- self_cal_adc_capture_delay
- self_cal_adc_xfer_delay
- This reduces the size of the x300_impl object file
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- Everytime the LMK is configured, we do the following:
- Reset all LMK regs
- Wait for LMK lock
- Reset radio_clk PLL in FPGA
- Wait for FPGA PLL to lock
- Assert radio_rst which resets downstream radio logic
- This address the intermittent self-cal failures due to uncalibrated IDELAY taps
- Bumped FPGA compat to 12
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- New device arg "ext_adc_self_test" triggers the test
- ext_adc_self_test=<time> runs the test for "time" seconds
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- product code, revision and revision compat errors are now exceptions
- Added recover_mb_eeprom arg to recover from a corrupt/uninitialized EEPROM
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- Added new field "revision_compat" to mb_eeprom
- Enforce a revision_compat of 7
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- Added new PCIe and MB PIDs for new boards
- Added an error if MB PID is invalid
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* Single class for loading firmware/FPGA images onto devices instead of multiple utilities
* Loading functions are registered for each device, corresponding to their --args="type=foo" name
* Deprecation warnings added to all product-specific image loading utilities
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Conflicts:
fpga-src
host/CMakeLists.txt
host/cmake/Modules/UHDVersion.cmake
host/lib/usrp/b200/b200_impl.hpp
host/lib/usrp/e300/e300_fpga_defs.hpp
host/lib/usrp/x300/x300_fw_common.h
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- If the self-cal fails, UHD waits for 2 sec for the ADC temp
to stabilize and retries the self-cal
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- Self-calibration routine steps through various values of IDELAY
taps on the SS data bits to detect metastability in the capture interface
and computes an ideal delay tap value
- Self calibration is triggered at device creation
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