| Commit message (Collapse) | Author | Age | Files | Lines |
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claim causing discovery to fail
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- Load EEPROM data into firmware memory to access from there instead of driving the I2C bus directly
- Fixed firmware performance issues by removing the popcntll() function and reducing frequency of background tasks to once every 10ms
- Added x300_mb_eeprom_iface to handle cases of devices with older and newer firmware
- Added checks for claim to device before driving the I2C bus
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Just skip current receive buffer and do not stop processing udp packets
completely.
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types)
- Also removes all references to boost/cstdint.hpp and replaces it with
stdint.h (The 'correct' replacement would be <cstdint>, but not all of our
compilers support that).
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Reviewed-By: Derek Kozel <derek.kozel@ettus.com>
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- The value of db_eeprom_t being written was stale due to a caching bug
- Updated subscriber for db_eeprom_t to write the EEPROM state *and*
cache it locally
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
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Reviewed-By: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Martin Braun <martin.braun@ettus.com>
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These are USRP RIO (X310) devices with TwinRX daughter-boards.
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This proved helpful on devices where the EEPROM is wrong about hardware
revision, and the EEPROM writing doesn't work, because the ADC self-test
fails due to being run for the wrong board revision.
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get_tx_hints()
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This adds a feature that is already present in e3xx and n230
products allowing to read back the fpga git hash the current
image has been built from.
The value is available via property tree at:
/mboards/0/fpga_version_hash
Note: A compatibility number bump is required, as otherwise the
register will always read back 0
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
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- UHD and ZPU is now aware of Aurora SFP+ transceivers in the FPGA image
- Added script to exercise Aurora BIST features
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This proved helpful on devices where the EEPROM is wrong about hardware
revision, and the EEPROM writing doesn't work, because the ADC self-test
fails due to being run for the wrong board revision.
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- If there were duplicate IPs in the mboard eeprom, the last one would be selected instead of the first
- The default IP addresses (used for the case where the mboard eeprom can't be read) would overwrite the previous settings
- Added a warning for duplicate IP entries in the mboard eeprom
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- This change ensures that the smallest frame size is chosen with dual ethernet
- It helps avoid any issues with using frame sizes larger than what the smaller link supports
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- Fixed an issue where 10GE on the HGS image presented a false warning for the link capacity
- Removed some unnecessary variables after cleanup
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Conflicts:
host/lib/usrp/cores/gpio_core_200.cpp
host/lib/usrp/dboard/db_ubx.cpp
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- Disabled MAX2871 VCO auto selection for phase sync
- Added checks for new phase sync constraints recently published by Maxim
- Added dboard_clock_rate option for X300
- Adjusted timing of SYNC signal relative to dboard referenc clock
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- Moved dboard iface initialization to dboard_manager
- Added a restricted register function. Restricted dboards
don't expose their control iface in the property tree
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- Added desired and coerced values and accessors to property
- Added support to register desired subscribers
- set APIs don't reallocate storage for a property value
- Renamed callback method registration APIs
- Registering 2 coercers or publishers for a property will throw
- Registering a coercer and a publisher for the same property will throw
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Conflicts:
host/lib/usrp/b200/b200_impl.hpp
host/lib/usrp/e300/e300_fpga_defs.hpp
host/lib/usrp/x300/x300_fw_common.h
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Compensate for headroom required to rotate a signal in
the CORDIC. Fixes some CORDIC-related clipping issues,
that reduced ENOB to 15 or 14.5 bits.
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Conflicts:
host/lib/usrp/cores/CMakeLists.txt
host/lib/usrp/x300/x300_impl.hpp
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- Refactored GPIO ATR definitions
- Added new 3000 core with a more efficient API
- Added a separate db_gpio_atr core to control the ATR bus
- Ported b2xx, e3xx and x3xx to the new core
- Minor cleanup
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- Added HG vs HGS detection logic
- Added DMA FIFO configuration code
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Compensate for headroom required to rotate a signal in
the CORDIC. Fixes some CORDIC-related clipping issues,
that reduced ENOB to 15 or 14.5 bits.
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- It's status is thrown away anyway
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- Included list header in soft_reg header
- Fixed typo in x300_impl
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