uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	x300: fixup minimum master clock rate	Brent Stapleton	2018-11-21	1	-1/+1
\| \| \| \| \|	Recent clocking changes set the minimum master clock rate to 187.5MHz, instead of the actual 184.32MHz. This change corrects that.
*	x300: New mode to configure master clock rate	Scott Torborg	2018-11-16	1	-3/+4
\| \| \| \| \| \| \| \|	Add a new clocking mode to automatically configure arbitrary master clock rates. Co-authored-by: Brent Stapleton <brent.stapleton@ettus.com> Co-authored-by: Martin Braun <martin.braun@ettus.com>
*	x300: Remove 120 MHz option	Martin Braun	2018-11-07	1	-1/+1
\| \| \| \| \|	None of our FPGA images support a 120 MHz master clock rate, so the UHD code should match that.
*	x300: Use constrained_args	Martin Braun	2018-08-10	1	-1/+2
\| \| \| \| \| \| \|	x300_impl will now use a constrained_device_args_t-derived object to parse device args. No API or functional changes.
*	x300: Move defaults to their own header	Martin Braun	2018-08-10	1	-0/+107
	Also puts all defaults into the uhd::usrp::x300 namespace. This commit does some renaming and refactoring, but no functional changes.