Commit message (Collapse) | Author | Age | Files | Lines | |
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* | x300: Updated CLK->DATA delay for ADC | Ashish Chaudhari | 2015-07-22 | 1 | -2/+2 |
| | | | | | | | | - The value was originally empirically determined based on self-cal results. After the fix for uncalibrated IDELAY, the self-cal offset data was no longer correct. - The new delay through the ADC ensures that the self-cal nominally pick the halfway tap of 16 | ||||
* | x300: Added self-cal to tune ADC source-sync data delays | Ashish Chaudhari | 2015-07-07 | 1 | -2/+2 |
| | | | | | | | - Self-calibration routine steps through various values of IDELAY taps on the SS data bits to detect metastability in the capture interface and computes an ideal delay tap value - Self calibration is triggered at device creation | ||||
* | Merge branch 'maint' | Martin Braun | 2014-09-25 | 1 | -2/+12 |
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| * | x300: added reset and resync of ADCs and DACs when changing reference clock | michael-west | 2014-09-25 | 1 | -3/+13 |
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* | | Added missing pure virtual destructors to base classes | Nicholas Corgan | 2014-09-01 | 1 | -1/+5 |
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* | Merging USRP X300 and X310 support!! | Ben Hilburn | 2014-02-04 | 1 | -0/+133 |