| Commit message (Collapse) | Author | Age | Files | Lines |
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Must zero out the default IQ correction to have zero effect by default.
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1) use bottom bit for force lock condition,
that way we never check the time after proper shutdown
2) dont allow lock condition under fpga compat mismatch
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This simplified some copy pasta in the io_impl.cpp files,
and adds a place for sc8 tx mode in the tx dsp core code.
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This is similiar to printing 'U' and 'S'. This functionality is not yet
supported on the USRP1.
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dont clear when using the compat device API
tx clear also resets expected seqnum
tx clear on usrp2 resets flow control monitor
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