| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | usrp1: work on usrp1 hardware compat with the api | Josh Blum | 2011-01-17 | 1 | -1/+2 |
| | | | | | | | today we added shutoff the DAC when not transmitting using EOB as an indicator added various other features and cleaned up code for soft time control | ||||
| * | uhd: update copyright dates on host code | Josh Blum | 2011-01-13 | 1 | -1/+1 |
| | | |||||
| * | usrp1: implement soft time ctrl for send at, recv at | Josh Blum | 2011-01-13 | 1 | -1/+5 |
| | | |||||
| * | usrp1: use the transport frame sizes to calculate the max spp | Josh Blum | 2010-10-06 | 1 | -8/+2 |
| | | | | | | | | | | The max send spp is the frame size minus the alignment padding. This allows us to copy a remainder into a new buffer and always commit multiples of the alignment size (512 bytes). Reworked the managed send buffer implementation to handle the above. Uses only managed memory, and only mem-copied under the alignment. | ||||
| * | uhd: implemented a double timeout (in seconds) for send and recv chains | Josh Blum | 2010-10-01 | 1 | -4/+3 |
| | | | | | | | | | converted all size_t timeout_ms to double timeout bounded and alignment buffer now take double timeout added timeout to device::send and zero_copy_if::get_send_buff | ||||
| * | usrp1: multi-channel tx working, modified vrt handler to interleave | Josh Blum | 2010-09-23 | 1 | -2/+2 |
| | | |||||
| * | usrp1: reworked the io_impl for usrp1 to use the vrt packet handler | Josh Blum | 2010-09-22 | 1 | -2/+10 |
| | | | | | | | | | used dummy packers and unpackets that have a header size of zero created wrapper around the data transport to handle non-512 multiple sends honor the eob flag on send to flush the send buffer | ||||
| * | usrp1: implemented multi-channel dsp control of shift freq | Josh Blum | 2010-09-20 | 1 | -2/+4 |
| | | | | | | | usrp: simple usrp calls into single usrp and prints deprecation warning usrp: tune helper now supports multi-channel dsps | ||||
| * | uhd: added single usrp interface, added usrp1 properties to prop names | Josh Blum | 2010-09-20 | 1 | -0/+6 |
| | | |||||
| * | usrp1: handle special dbsrx clocking case | Josh Blum | 2010-08-26 | 1 | -3/+5 |
| | | |||||
| * | Merge branch 'usrp1_next' into usrp1 | Thomas Tsou | 2010-08-26 | 1 | -0/+4 |
| |\ | |||||
| | * | usrp1: Refactor I/O implementation | Thomas Tsou | 2010-08-23 | 1 | -0/+4 |
| | | | |||||
| * | | usrp1: images for usrp1, makefile checks for image generation dependencies | Josh Blum | 2010-08-19 | 1 | -5/+1 |
| |/ | |||||
| * | usrp1: Remove hard coded clock values | Thomas Tsou | 2010-08-16 | 1 | -2/+0 |
| | | | | | Get clock values from clock control, where the master setting lives. | ||||
| * | usrp1: add skeleton code for setting subdev spec | Josh Blum | 2010-08-15 | 1 | -0/+2 |
| | | |||||
| * | usrp1: created daughterboard duality | Josh Blum | 2010-08-15 | 1 | -45/+58 |
| | | | | | | | everything that should have two is now stored into a dictionary of slot to type the set and get functions are now bound with a third argument for dboard slot the dboard iface has yet to be completed with the correct registers for a vs b | ||||
| * | usrp1: Add usrp1 implementation | Thomas Tsou | 2010-08-13 | 1 | -0/+182 |
 |
index : uhd | |
| Ettus' UHD Repository |
| aboutsummaryrefslogtreecommitdiffstats |