| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | usrp1: removed unused files from impl dir | Josh Blum | 2011-07-01 | 1 | -222/+0 |
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| * | usrp1: super packet handler support squashed | Josh Blum | 2011-06-14 | 1 | -1/+4 |
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| * | usrp1: correct TX codec rate, it should also read 64e6 when probed | Josh Blum | 2011-05-14 | 1 | -15/+9 |
| | | | | | | | We were using clock_rate*2 to simulate a codec rate of 128MHz. This reflected the old gnuradio API, but the rate between FPGA and codec is really 64MHz for both rx and tx directions. | ||||
| * | usrp1: apply conditional disables/enables to rx and tx | Josh Blum | 2011-05-14 | 1 | -0/+4 |
| | | | | | | | | | Scapped the old gnuradio code for information about VRQ_FPGA_SET_XX_ENABLE. It turns out that we should disabled + restore state when changing muxes or rates. The USRP seems to stream properly when receiving single and dual channel. Prior to this commit, tx was accicentally always disabled from a few commits ago. | ||||
| * | uhd: removed more iostream stuff from usrp* implementations | Josh Blum | 2011-05-04 | 1 | -3/+3 |
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| * | uhd: got all compiling w/ changes, changes to channel calculation in multi usrp | Josh Blum | 2011-02-17 | 1 | -3/+3 |
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| * | usrp: support for multiple dsps in props and implemented in usrp1 | Josh Blum | 2011-02-17 | 1 | -50/+43 |
| | | | | | | | | usrp1 previously had 1 rx and 1 tx dsp with multiple freq params, it now has N and M dsps each with one freq param. This is more consistent with the multi-dsp model. The hack here is to only apply stream commands and sample rate changes to dsp0. | ||||
| * | usrp1: negate the rx cordic reg word because things were inverted and nobody ↵ | Josh Blum | 2010-12-16 | 1 | -1/+1 |
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| * | usrp1: removed msvc warnings for usrp1 impl code | Josh Blum | 2010-09-23 | 1 | -6/+4 |
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| * | usrp1: implemented multi-channel dsp control of shift freq | Josh Blum | 2010-09-20 | 1 | -29/+48 |
| | | | | | | | usrp: simple usrp calls into single usrp and prints deprecation warning usrp: tune helper now supports multi-channel dsps | ||||
| * | uhd: added single usrp interface, added usrp1 properties to prop names | Josh Blum | 2010-09-20 | 1 | -2/+8 |
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| * | usrp1: Fix DDC rate storage value and comments for multiple channel support | Thomas Tsou | 2010-08-27 | 1 | -4/+14 |
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| * | usrp1: Add TODO comments | Thomas Tsou | 2010-08-27 | 1 | -1/+8 |
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| * | usrp1: Refactor I/O implementation | Thomas Tsou | 2010-08-23 | 1 | -0/+4 |
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| * | usrp1: Refactor mboard tuning code | Thomas Tsou | 2010-08-18 | 1 | -22/+4 |
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| * | usrp1: Remove hard coded clock values | Thomas Tsou | 2010-08-16 | 1 | -4/+6 |
| | | | | | Get clock values from clock control, where the master setting lives. | ||||
| * | usrp1: compiling with the latest next | Josh Blum | 2010-08-16 | 1 | -6/+6 |
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| * | usrp1: created daughterboard duality | Josh Blum | 2010-08-15 | 1 | -26/+29 |
| | | | | | | | everything that should have two is now stored into a dictionary of slot to type the set and get functions are now bound with a third argument for dboard slot the dboard iface has yet to be completed with the correct registers for a vs b | ||||
| * | usrp1: Add usrp1 implementation | Thomas Tsou | 2010-08-13 | 1 | -0/+197 |
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