| Commit message (Collapse) | Author | Age | Files | Lines |
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Co-Authored-By: Alex Williams <alex.williams@ni.com>
Co-Authored-By: Sugandha Gupta <sugandha.gupta@ettus.com>
Co-Authored-By: Brent Stapleton <brent.stapleton@ettus.com>
Co-Authored-By: Ciro Nishiguchi <ciro.nishiguchi@ni.com>
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This fixes fpga image loading for devices which not have SFP port
and hence no fpga_type e.g. E310.
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Applying formatting changes to all .cpp and .hpp files in the following
directories:
```
find host/examples/ -iname *.hpp -o -iname *.cpp | \
xargs clang-format -i -style=file
find host/tests/ -iname *.hpp -o -iname *.cpp | \
xargs clang-format -i -style=file
find host/lib/usrp/dboard/neon/ -iname *.hpp -o -iname *.cpp | \
xargs clang-format -i -style=file
find host/lib/usrp/dboard/magnesium/ -iname *.hpp -o -iname *.cpp | \
xargs clang-format -i -style=file
find host/lib/usrp/device3/ -iname *.hpp -o -iname *.cpp | \
xargs clang-format -i -style=file
find host/lib/usrp/mpmd/ -iname *.hpp -o -iname *.cpp | \
xargs clang-format -i -style=file
find host/lib/usrp/x300/ -iname *.hpp -o -iname *.cpp | \
xargs clang-format -i -style=file
find host/utils/ -iname *.hpp -o -iname *.cpp | \
xargs clang-format -i -style=file
find mpm/ -iname *.hpp -o -iname *.cpp | \
xargs clang-format -i -style=file
```
Also formatted host/include/, except Cpp03 was used as a the language
standard instead of Cpp11.
```
sed -i 's/ Cpp11/ Cpp03/g' .clang-format
find host/include/ -iname *.hpp -o -iname *.cpp | \
xargs clang-format -i -style=file
```
Formatting style was designated by the .clang-format file.
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Co-authored-by: Sugandha Gupta <sugandha.gupta@ettus.com>
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Added default FPGA image path, similar to how we do it in X300.
We determine the path to the fpga image path by checking the following:
1. --fpga-path provided by the user and that file exists
2. FPGA type (`fgpa`) provided in the args
3. Checking the fpga type of the currently loaded image on the
device (pulled through `MPM.get_component_info`)
4. Otherwise, error out
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All copyright is now attributed to "Ettus Research, a National
Instruments company".
SPDX headers were also updated to latest version 3.0.
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-Increased timeout from 10s to 20s. This time is also per component file
being updated. For example, when updating the FPGA with new .bit and
.dts files, the timeout will be 40s.
-Also added log message to let user know their device is updating, not
frozen.
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- The MPM function update_component now accepts multiple components to
be updated in one RPC call.
- Updated the property tree and image loader to match this change.
- Also added DTS loading to the image loader.
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uhd_image_loader now supports type=n310, and loads the FPGA provided in the arguments.
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