| Commit message (Collapse) | Author | Age | Files | Lines |
| |
|
| |
|
| |
|
|
|
|
|
|
|
|
|
| |
This uses the new b100/e100 common core and FIFO control modules.
Subsequent commit will be the compatible FPGA merge.
Conflicts:
host/lib/usrp/e100/io_impl.cpp
|
|
|
|
| |
When an on-board GPSDO is detected, "gpsdo" is added to the options.
|
| |
|
| |
|
|
|
|
| |
dboard subdev names are more descriptive (RFX RX is now RFX1200 RX, etc)
|
|
|
|
| |
Must zero out the default IQ correction to have zero effect by default.
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
|
|
|
| |
git log
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
| |
|
|
|
|
|
|
|
|
| |
spi and i2c are done w/ polling, but this is ok,
the transactions always complete by the first check
a gpio is used to wake up poll() and check for messages.
messages are read using poke32, unpacked, and enqueued.
|
| |
|
|
|