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This sets the reference clock for X300 daughterboards (other than UBX)
to 100 MHz by default to improve RF performance.
Note: The UBX daughterboard requires a clock rate of no more than the
max pfd frequency (50 or 25 MHz depending on the hardware rev) in
order to maintain phase synchronization. If a UBX daughterboard is
present on the X300, the clock rate for all daughterboards will be set
to the pfd frequency by default. This is because of the limitation on
X300 that requires the daughterboards to use the same clock rate.
Signed-off-by: mattprost <matt.prost@ni.com>
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