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* vita core: Fix the hard reset issue by flushing the flow control windowPaul David2016-04-181-0/+13
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* Added option for writes to specify a SPI speedDerek Kozel2016-04-081-6/+20
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* Merge branch 'maint'Martin Braun2016-04-071-2/+2
|\ | | | | | | | | Conflicts: host/lib/usrp/cores/gpio_core_200.cpp
| * gpio core: Fixed a mismatch in the address assignment for RX and full duplexPaul David2016-04-061-2/+2
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* | usrp3: Added RX DSP support for heterodyne samplingAshish Chaudhari2016-03-212-14/+43
| | | | | | | | | | | | | | | | | | - rx_dsp_core: set_mux takes in a fe_connection obj to determine IQ mapping and sampling mode parameters - rx_dsp_core: Support a non-zero IF for downconversion The current strategy applies a software DSP freq offset which eats into the range of the CORDIC which is OK because heterodyne assumes real-mode sampling
* | Updated code to work for new minimum dependenciesNicholas Corgan2016-03-211-1/+1
| | | | | | | | | | * Removed code referencing now-unsupported versions of Boost * Added <stdint.h> includes where needed
* | Merge branch 'maint'Ashish Chaudhari2016-02-181-16/+48
|\| | | | | | | | | | | Conflicts: host/lib/usrp/cores/gpio_core_200.cpp host/lib/usrp/dboard/db_ubx.cpp
| * UBX: Phase synchronizationmichael-west2016-02-181-16/+48
| | | | | | | | | | | | | | - Disabled MAX2871 VCO auto selection for phase sync - Added checks for new phase sync constraints recently published by Maxim - Added dboard_clock_rate option for X300 - Adjusted timing of SYNC signal relative to dboard referenc clock
* | usrp: Refactored dboard_iface for all productsAshish Chaudhari2016-02-164-41/+135
| | | | | | | | | | | | | | - Made dboard_iface an interface! Removed PIMPL - Added unit "BOTH" to dboard API and expanded GPIO API width to 32 - Removed gpio_debug_mux. No product ever used that - Refactored gpio_atr cores to work with new dboard_iface
* | prop_tree: Multiple API enhancements to uhd::propertyAshish Chaudhari2016-02-114-13/+13
| | | | | | | | | | | | | | | | | | - Added desired and coerced values and accessors to property - Added support to register desired subscribers - set APIs don't reallocate storage for a property value - Renamed callback method registration APIs - Registering 2 coercers or publishers for a property will throw - Registering a coercer and a publisher for the same property will throw
* | math: Removed now superfluous constants. Removes a lot of compiler warningsMartin Braun2016-02-041-1/+0
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* | cores: Factored out some common codeMartin Braun2016-01-267-144/+121
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* | n230: Added N230 device supportAshish Chaudhari2016-01-053-0/+121
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* | Merge branch 'maint'Ashish Chaudhari2015-12-152-2/+13
|\| | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.hpp host/lib/usrp/e300/e300_fpga_defs.hpp host/lib/usrp/x300/x300_fw_common.h
| * B210: Add VITA time synchronization on internal signalmichael-west2015-12-102-2/+13
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| * cores: Corrected scaling_adjustment calculationIan Buckley2015-09-032-12/+32
| | | | | | | | | | | | Compensate for headroom required to rotate a signal in the CORDIC. Fixes some CORDIC-related clipping issues, that reduced ENOB to 15 or 14.5 bits.
* | usrp3: Added separete caches for GPIO OUT and ATR IDLEAshish Chaudhari2015-10-181-5/+39
| | | | | | | | | | | | - Masking with ATR Disabled deferred to flush - Some dboards like to switch between GPIO and ATR mode and still expect state to be maintained
* | fixup! usrp3: Fixed issue where ATR Idle could clobber GPIO outAshish Chaudhari2015-10-161-4/+4
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* | fixup! usrp3: Fixed issue where ATR Idle could clobber GPIO outAshish Chaudhari2015-10-161-1/+1
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* | Merge branch 'ashish/gpio_atr_redux' into master-stagingAshish Chaudhari2015-10-155-34/+452
|\ \ | | | | | | | | | | | | | | | Conflicts: host/lib/usrp/cores/CMakeLists.txt host/lib/usrp/x300/x300_impl.hpp
| * | usrp3: Fixed issue where ATR Idle could clobber GPIO outAshish Chaudhari2015-10-102-10/+21
| | | | | | | | | | | | | | | | | | - gpio_atr_3000 will not blindly use the mask when writing the ATR and GPIO OUT values. The mask will be ANDed with the value in the ATR Disable register
| * | usrp3: Added more inline comments to gpio_atr_3000Ashish Chaudhari2015-10-071-5/+31
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| * | usrp3: Cleaned up some GPIO ATR constants and typesAshish Chaudhari2015-09-302-13/+32
| | | | | | | | | | | | | | | - Removed implicit type converstions in ATR address passing - Changed magic numbers to named constants
| * | usrp3: Added new GPIO ATR 3000 coreAshish Chaudhari2015-09-295-34/+396
| | | | | | | | | | | | | | | | | | | | | | | | - Refactored GPIO ATR definitions - Added new 3000 core with a more efficient API - Added a separate db_gpio_atr core to control the ATR bus - Ported b2xx, e3xx and x3xx to the new core - Minor cleanup
* | | x300: Made DRAM FIFO size software configurableAshish Chaudhari2015-09-162-9/+111
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* | | usrp3: Added AXI DMA FIFO control coreAshish Chaudhari2015-09-163-0/+382
| | | | | | | | | | | | - Can access all registers in axi_dma_fifo.v
* | | usrp3: Added support for pre-FIFO TX flowcontrolAshish Chaudhari2015-09-162-22/+51
|/ / | | | | | | | | | | - tx_vita_core_3000 can now monitor for flow-control immediately before the radio or immediately before the radio external FIFO - B200 does not have an external FIFO so it will use the default config
* / cores: Corrected scaling_adjustment calculationIan Buckley2015-09-082-12/+32
|/ | | | | | Compensate for headroom required to rotate a signal in the CORDIC. Fixes some CORDIC-related clipping issues, that reduced ENOB to 15 or 14.5 bits.
* cores: Moved subtree populate code to DSP cores (X3x0, E310)Martin Braun2015-07-295-3/+58
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* cores: Moved subtree populate code to frontend coresMartin Braun2015-07-294-2/+52
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* Merge branch 'maint'Martin Braun2015-04-062-3/+12
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| * uhd: Add ability to get and set command time through dboard_iface.michael-west2015-04-032-3/+12
| | | | | | | | | | This creates a wb_iface child class called timed_wb_iface, which adds support for timed commands.
* | Merge branch 'maint'Martin Braun2015-03-272-3/+3
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| * Warning fixesNicholas Corgan2015-03-272-3/+3
| | | | | | | | | | | | | | * CMake now not applying C++ flags to C files * GCC 4.4: anti-aliasing rules * MSVC: narrowing, differences in subclass function parameters * Clang: uninitialized variables
* | Merge branch 'uhd/gpio_rename'Martin Braun2015-03-111-2/+19
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| * | gpio: Renamed enums to avoid clash with generic, compiler-provided namesMartin Braun2015-03-111-2/+19
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* | | Merge branch 'maint'Martin Braun2015-03-112-4/+4
|\ \ \ | |/ / |/| / | |/ | | Conflicts: host/include/uhd/transport/vrt_if_packet.hpp
| * uhd: Fixed several type-cast related warnings for naggy compilersMartin Braun2015-03-112-4/+4
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* | B200: UHD support for FPGPIO connector on REV6+ boards.Ian Buckley2015-03-091-1/+8
|/ | | | | | - GPIO on UART connector all board Revs - Consolidated fpgpio_bitbang into fpgpio example and renamed it gpio - Changed FP_GPIO readback address to match X300
* b200: Bugfix#672: Enable the correct half-bandsAshish Chaudhari2015-01-211-1/+1
| | | | - The control bits for the small and the large half-bands were swapped which would cause the large HB to run too fast. Swapped hb0 and hb1 bits to fix the issue.
* math: Added a new uhd::math namespace + float comparison routinesBen Hilburn2014-10-074-28/+20
| | | | | * Float comparison is applied to tuning logic in DSP cores. * Properly using INT_MAX/MIN constants, defined in utils/math.hpp
* uhd: fixed RX and TX DSP cores for 3rd generation productsBen Hilburn2014-10-072-8/+52
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* uhd: fixing TX DSP tuning on gen2 devices, special changes for n2xxBen Hilburn2014-10-072-8/+53
| | | | This fixes RX DSP core 200 from tuning outside range and causing overflows.
* Merge branch 'maint'Martin Braun2014-09-241-8/+0
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| * uhd: Fixed logging bug (#476) -- UHD logging has unexplained effect on ↵michael-west2014-09-241-8/+0
| | | | | | | | | | | | | | packet loss. - Removed logging from radio_ctrl_core_3000 - Changed logging facility to prevent type conversion when message is not logged
* | Added missing pure virtual destructors to base classesNicholas Corgan2014-09-0136-34/+146
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* Fix for BUG #517: B200: Regression of power level on RXmichael-west2014-07-221-1/+1
| | | | - Fixed scalar for RX DSP core
* Fix for BUG #527: N200: 50 Msps results in two tonesmichael-west2014-07-011-1/+2
| | | | - Adjusted check to enable first half-band filter only if the rate is decimated enough between the CIC and other half-band filter
* - Changed XOR to OR for REG_DSP_RX_MUX flags.michael-west2014-06-121-3/+3
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* Fix for BUG #500: B210: RX channels are not phase alignedmichael-west2014-06-062-3/+8
| | | | - Adding UHD side code to invert second RX channel
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