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* ad9361: Made recommended rate a constantMartin Braun2014-09-023-3/+4
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* Added missing pure virtual destructors to base classesNicholas Corgan2014-09-014-4/+38
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* uhd: Changed line endings from Windows -> UNIXAshish Chaudhari2014-08-212-2039/+2039
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* ad9361: Output PLL lock status on ctrl output pins.Ashish Chaudhari2014-08-211-1/+1
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* ad9361: Fixed MSVC build issuesAshish Chaudhari2014-08-132-2034/+2039
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* ad9361: Fixed debug messages with UHD_LOGsAshish Chaudhari2014-08-131-19/+15
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* ad9361: Fixed TX direction bug in ad9361_ctrlAshish Chaudhari2014-08-131-1/+1
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* ad9361: Added synchronization to IO and device classesAshish Chaudhari2014-08-133-20/+36
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* ad9361: Cleaned up constants and macrosAshish Chaudhari2014-08-133-83/+66
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* ad9361: Cleaned up errors and debug messagesAshish Chaudhari2014-08-121-45/+46
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* ad9361: Converted stdint types to boost typesAshish Chaudhari2014-08-127-136/+133
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* ad9361: Renamed ad9361_impl.c to ad9361_device.cppAshish Chaudhari2014-08-122-6/+1
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* b200, ad9361: Cleanup up AD9361 driverAshish Chaudhari2014-08-1211-1550/+1092
| | | | | - Removed transaction interface - Made the driver a C++ class
* b200: Added variable rate SPI core for AD9361 and ADF4001Ashish Chaudhari2014-08-012-4/+3
| | | | | - Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz
* b200: Moved AD9361 driver to hostAshish Chaudhari2014-08-0114-119/+2859
| | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
* Merge branch adding warning regarding MCR on the B2xx.Ben Hilburn2014-03-273-11/+19
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| * b200: changed ad9361 ctrl/transaction magic number 64 to macro, as it is in ↵Balint Seeber2014-03-192-9/+12
| | | | | | | | the FX3 FW
| * b200: changed ad9361 read timeout handling (kicks in when requesting ↵Balint Seeber2014-03-191-1/+1
| | | | | | | | master_clock_rate above 56MHz)
| * b200: throw exception when master clock rate (tick rate) is requested to be ↵Balint Seeber2014-02-141-1/+6
| | | | | | | | | | | | > max for certain # of channels (i.e. restrict to 30.72MHz for MIMO) Also includes sscanf type fix in b200_impl and longer timeout for AD9361 read
* | Pulling in patch from Marcus Leech for includes and older OSes.Ben Hilburn2014-03-261-0/+3
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* Pushing the bulk of UHD-3.7.0 code.Ben Hilburn2014-02-142-20/+21
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* Merging USRP X300 and X310 support!!Ben Hilburn2014-02-041-1/+46
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* uhd: so Coverity doesn't complain, removed variable declarations tooBalint Seeber2014-02-031-0/+2
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* uhd: disabled other use of _claimed and cond sync variables (no effect if ↵Balint Seeber2014-02-031-0/+2
| | | | previous change is used anyway)
* uhd: disabled atomic 'claim' check for multi-threaded access to ↵Balint Seeber2014-02-031-1/+5
| | | | | | | | | | recv_packet_demuxer_3000 The only caller is from super_packet_recv_handler, which is already not thread-safe. The only underlying transport (libusb1_zero_copy) is thread-safe, so this shouldn't have an impact. This solves the issue where (e.g. from GNU Radio), 'interrupt' is called on the worker thread while waiting for a join when worker thread is torn down (e.g. GR top block stop/wait/start), which would cause the demuxer to still think the transport was claimed, as an interrupted exception will be thrown in 'wait_for_completion' in the transport, and execution will not continue back into the demuxer to mark the transport as un-claimed, so future 'recv' streamer calls will always fail since the demux thinks the transport is still claimed from before.
* 120 MHz daughterboard support, Integer-N tuning, ADF435x code consolidationNicholas Corgan2014-01-243-0/+220
| | | | | | | * Added support for new CBX-120, SBX-120, and WBX-120 daughterboards * Added implementation of Integer-N tuning for all CBX, SBX, and WBX daughterboards * Added --int-n option to examples to show how to use Integer-N tuning API * Removed duplicate ADF4350/ADF4351 code and moved it to common/adf435x_common.cpp
* Merge of mwest's fix to the sse2_fc32_to_sc16 converter.Ben Hilburn2013-12-111-2/+2
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* Squashed merge of Coverity fixes.Ben Hilburn2013-11-271-0/+6
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* uhd: wb_iface is now a public interfaceJosh Blum2013-10-041-2/+3
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* b200: use a union to perform double pack/unpackJosh Blum2013-09-061-8/+14
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* b200: lower clock rate is 5MHz due to DCMJosh Blum2013-08-161-1/+2
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* uhd: strnlen for platforms w/o itJosh Blum2013-07-251-1/+9
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* uhd: allow for 16 bit i2c and eeprom addrsJosh Blum2013-07-241-4/+4
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* b200: use existing query rate calls to clipJosh Blum2013-07-192-5/+5
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* uhd: squashed support modules for usrp3 fpga coresJosh Blum2013-07-197-2/+703
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* uhd: packet demuxer, reset queue front b4 popJosh Blum2013-07-151-0/+1
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* b100: switch to new packet demuxerJosh Blum2013-07-151-0/+114
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* Merge branch 'maint'Josh Blum2013-03-251-11/+0
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| * usrp1: fix eeprom write capability through fx2Josh Blum2013-03-251-11/+0
| | | | | | | | | | The vectorized eeprom write was faster but broken, removed overload which falls back to the one byte at a time.
* | Merge branch 'maint'Nicholas Corgan2013-02-271-1/+1
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| * lib: addresses B100 FIFO timeout errorNicholas Corgan2013-02-271-1/+1
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* | b100: create an overflow packet on unknown SID errorJosh Blum2013-02-271-1/+29
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* Merge branch 'maint34' into maintNicholas Corgan2012-11-162-3/+19
|\ | | | | | | | | | | Conflicts: host/lib/usrp/b100/b100_impl.cpp host/lib/usrp/usrp1/usrp1_impl.hpp
| * lib/cmake: CPack source workNicholas Corgan2012-11-162-3/+19
| | | | | | | | | | * Removed all host code dependencies on firmware headers * Put in CMake settings for CPack source
* | Merge branch 'next'Josh Blum2012-08-313-1/+358
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| * | usrp: added fifo_ctrl_excelsior for FIFO control + async msgsJosh Blum2012-07-023-1/+358
| | | | | | | | | | | | | | | | | | The fifo_ctrl_excelsior is the host code for dealing with E100/B100 control messages and async messages. It also has the SPI implementation. Timed commands are implemented on top of this code.
* | | cal: dont interpolate if freq is the same +/- epsilonJosh Blum2012-08-291-0/+12
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* / fx2: simplify i2c code and overload eeprom read/writeJosh Blum2012-03-261-15/+24
|/ | | | | Overload eeprom routines to do it in 1 transaction, since default will split it up into many for each byte.
* uhd: rev iq correction numbers formatJosh Blum2012-03-141-43/+6
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* uhd: added async md user payload and common utilsJosh Blum2012-02-141-0/+71
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