| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | b200: Added variable rate SPI core for AD9361 and ADF4001 | Ashish Chaudhari | 2014-08-01 | 1 | -1/+1 |
| | | | | | | - Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz | ||||
| * | uhd: squashed support modules for usrp3 fpga cores | Josh Blum | 2013-07-19 | 1 | -0/+151 |
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| Ettus' UHD Repository |
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