uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	ad936x: removing gain_offset from rx set_gain	Jon Kiser	2015-02-11	1	-20/+5
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*	ad9361: Removed unnecessary digital TX attenuation	Ashish Chaudhari	2015-01-23	1	-1/+7
\| \| \| \| \| \|	- Fix ported from He. The current TX filter does not need the additional -6dB of headroom. Set it to zero so we meet our max power specs.
*	fixup! ad9361: More check for interpolation/decim ratios	Ashish Chaudhari	2015-01-23	1	-1/+1
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*	ad9361: More check for interpolation/decim ratios	Martin Braun	2015-01-23	2	-7/+16
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*	ad9361: bugfix for ad9361 gain value truncation	Jon Kiser	2015-01-20	2	-6/+10
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*	B200: Bug #656. Added FIR coeffs for filters with Fs/4 stop band.	Ian Buckley	2015-01-19	3	-17/+62
\| \| \| \|	AD9361 driver can now select coeffs for different interpolation ratios.
*	ad9361: rssi readout	Julian Arnold	2015-01-12	2	-0/+25
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*	ad9361: Made recommended rate a constant	Martin Braun	2014-09-02	2	-1/+2
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*	uhd: Changed line endings from Windows -> UNIX	Ashish Chaudhari	2014-08-21	2	-2039/+2039
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*	ad9361: Output PLL lock status on ctrl output pins.	Ashish Chaudhari	2014-08-21	1	-1/+1
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*	ad9361: Fixed MSVC build issues	Ashish Chaudhari	2014-08-13	2	-2034/+2039
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*	ad9361: Fixed debug messages with UHD_LOGs	Ashish Chaudhari	2014-08-13	1	-19/+15
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*	ad9361: Added synchronization to IO and device classes	Ashish Chaudhari	2014-08-13	2	-15/+30
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*	ad9361: Cleaned up constants and macros	Ashish Chaudhari	2014-08-13	2	-78/+65
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*	ad9361: Cleaned up errors and debug messages	Ashish Chaudhari	2014-08-12	1	-45/+46
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*	ad9361: Converted stdint types to boost types	Ashish Chaudhari	2014-08-12	5	-114/+112
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*	ad9361: Renamed ad9361_impl.c to ad9361_device.cpp	Ashish Chaudhari	2014-08-12	1	-0/+0
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*	b200, ad9361: Cleanup up AD9361 driver	Ashish Chaudhari	2014-08-12	6	-1190/+1028
\| \| \| \| \|	- Removed transaction interface - Made the driver a C++ class
*	b200: Moved AD9361 driver to host	Ashish Chaudhari	2014-08-01	9	-0/+2577
	- Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow