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path: root/host/lib/usrp/common/ad9361_driver
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* lib: add default ctors to structs and initialize members properlyAndrej Rode2017-01-121-3/+15
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* lib: remove statements after throwAndrej Rode2017-01-121-1/+1
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* ad9361: assign before throwAndrej Rode2017-01-121-1/+1
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* Remove all boost:: namespace prefix for uint32_t, int32_t etc. (fixed-width ↵Martin Braun2016-11-085-184/+184
| | | | | | | | types) - Also removes all references to boost/cstdint.hpp and replaces it with stdint.h (The 'correct' replacement would be <cstdint>, but not all of our compilers support that).
* ad9361: Added option for safe SPIJonathon Pendlum2016-08-092-0/+13
| | | | - Also added check for reading chip ID
* b200: Updated minimum clock rate to match DCM changesMartin Braun2015-10-142-2/+4
| | | | | | Lowest master clock rate is now 220 kHz. At low clock rates, the convergence time for the DC offset and quadrature calibration times is much larger, though.
* B2XX: Added B200mini supportmichael-west2015-08-172-4/+12
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* ad9361: Delay Tx Quad Cal from initialization to streamer startTom Tsou2015-08-131-2/+8
| | | | | | | | | | | | | | | | | | | Patch addresses issue: #742 "tx_waveforms seems to produce unexpectedly large image" Tx Quad Cal performance is temporally dependent with better results when run after the AD9361 is configured for transmission than at initialization. This gets is roughly 5-10 dB of additional quadrature image suppression. Even better performance can be reached when Tx Quad Cal is run after streaming and the AD9361 is actively transmitting. Calibration in this state, however, requires user intervention by retuning the transmit chain by > 100 MHz. Total IQ suppression should be in the range of 40-50+ dBFS dependent on operating frequency. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* ad9361: Use separate Tx and RX frequency calibration intervalsTom Tsou2015-08-132-19/+39
| | | | | | | | | | | | | | | | | | Patch addresses issue: #872 "B200: Tx and Rx calibration share same frequency state" ADI specifies recalibration for certain paths when the LO shifts by more than 100 MHz. Tx and Rx maintain independent LO frequencies so use separate values for determining whether to perform re-calibration at tuning intervals. Also, maintain last calibration frequencies from initialization and clock rate changes. Doing so prevents a re-calibration if the first requested Tx or Rx frequency is close to the default values of 850 and 800 MHz respectively. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* ad9361: Reconfigure RF and baseband DC offset correctionTom Tsou2015-08-132-37/+39
| | | | | | | | | | | | | | | | | | | | | | | | Addressed and related issues: #186 "B200: Catalina RX signal distortion" #821 "Incorrect behavior with auto DC Offset correction turnned off" #820 "Rx DC Offset Correction Convergence on B2xx Dependent on Master Clock Rate" #755 "Demodulate IQ signal amplitude oscillation on B210 at 200 MHz carrier" Due to recent change "ad9361: Invert phase on Rx LNA bypass path", we now have uniform phase alignment across the entire gain range. This drastically improves performance of RF DC tracking - not to be confused with the - active and input dependent - baseband (BB) DC tracking loop. RF DC tracking is not affected by input signals and updates during gain changes. The updated configuration provides improved DC suppression for operation whether BB tracking loop is enabled or disabled. New behavior differs from the previous case where disabling BB tracking would clear all - static and active - calibration tables. Now, static correction tables are not wiped when BB tracking is turned off. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* ad9361: Enable single shot Rx Quad CalTom Tsou2015-08-132-31/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | Patch provides an alternative resolution to issue #807 "B210: severe distortion on In-phase data for some gain settings" Rx quadrature tracking, an active input-sensitive loop, causes problems on a handful of receive signals. Problematic signals include pulsed GMSK and near-DC tones among others. As an alternative, improve operation when active tracking is disabled. Run single shot quadrature calibration at the following events to provide calibrated image suppression. The corrections without active tracking are not input dependent. Rx quadrature single shot calibration points: 1. AD9361 initialization 2. Clock rate change 3. Tuning differences greater then 100 MHz when tracking is disabled Note that if tracking is enabled (default case), this patch has no effect during streaming. Only the non-default (user set) case is affected. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* ad9361: Updated copyright headersMartin Braun2015-07-216-6/+84
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* ad9361: Update Tx Quad Cal to match current gain tablesTom Tsou2015-07-131-1/+1
| | | | | | | | | | | | | | | | Fixes issue #828 "B200: Tx quadrature calibration regression in master" Following commit added new gain table settings to reflect updated values from ADI. Gain indices used by Tx Quad Cal were not matched to accommodate the new tables. 2b06c38 "b2xx: dc offset and iq imbalance correction control" Requirement for Tx Quad Cal is for TIA gain and analog LPF gain to be set at 0 dB, or 0x20 in the gain table. Final effect is a dramatic decrease in Tx DC offset and quadrature image. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* ad9361: Prevent positive loop gain on Rx quadrature trackingTom Tsou2015-07-131-1/+1
| | | | | | | | | | | | | | Patch fixes a portion of #807 "B210: severe distortion on In-phase data for some gain settings" ADI recommends that the "Prevent Pos Loop Gain" setting be enabled to prevent the Rx quadrature tracking loop from becoming unstable at low power levels. ADI Linux kernel driver also reflects this setting. We do not follow the ADI recommendation. Adjust accordingly. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* ad9361: Invert phase on Rx LNA bypass pathTom Tsou2015-07-131-1/+8
| | | | | | | | | | | | | | | | | | | This patch resolves issue #823 "B200: Receive RF DC calibration makes calibration worse below 34 dB" According to ADI reference documents, enabling any of the 3 LNA's in the receive path causes a 180 degree phase shift. Correspondingly, we invert the LNA bypass path (gain indices below 34 dB) to match. Testing, however, reveals that one of these statements or the polarity inversion setting itself is false. Disabling the switch results in expected behavior and proper phase alignment. Overall effect is up to 60 dB of DC offset suppression ahead of the Rx analog LPF. This reduces the problematic dependency on active baseband tracking and may resolves multiple tracking stability issues. Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
* Merge branch 'maint'Martin Braun2015-07-081-2/+2
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| * B200: New AD9361 I/O timing programming to work with new b200_io.v logic design.Ian Buckley2015-07-081-2/+2
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* | ad9361: brought in Boost.Assign std::map workaround for MSVC 2013Nicholas Corgan2015-06-291-4/+11
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* | Merge branch 'maint'Martin Braun2015-06-092-7/+30
|\| | | | | | | | | | | | | Conflicts: host/lib/usrp/common/ad9361_ctrl.hpp host/lib/usrp/common/ad9361_driver/ad9361_device.h host/lib/usrp/e300/e300_remote_codec_ctrl.hpp
| * B200/E300: Fix incorrect readback of frequency.michael-west2015-05-222-3/+17
| | | | | | | | When the LO is tuned it changes the frequency on both channels. The frequency value read back for the first channel was not updated when the LO frequency for the other channel was tuned to a different value.
| * ad9361: Minor clarifications on req_rate and baseband_bwMartin Braun2015-05-192-4/+13
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* | Merge branch 'maint'Martin Braun2015-04-142-2/+3
|\| | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_io_impl.cpp host/lib/usrp/common/ad9361_driver/ad9361_device.cpp host/lib/usrp/common/ad9361_driver/ad9361_device.h
| * ad9361: Removed recommended max clock rate warningMartin Braun2015-04-142-2/+3
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* | b2xx: filter API implementation. Supports listing of RX/TX filters, querying ↵Julian Arnold2015-03-192-53/+667
| | | | | | | | RX/TX filter information and writing of analog and FIR filters
* | ad9361: DC and IQ correction only done if df > 100MHz during a tune requestJulian Arnold2015-03-132-6/+15
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* | uhd: Fixed multiple compiler warningsMichael Dickens2015-03-111-14/+14
| | | | | | | | | | | | - Use ULL and LL etc. so compiler doesn't need to decide constant's types - define the empty 'while' loop to include {} to make older compilers happy - Use explicit type names for BOOST_CHECK_EQUAL
* | b2xx: AGC supportJulian Arnold2015-03-052-24/+158
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* | b2xx: dc offset and iq imbalance correction controlJulian Arnold2015-02-203-105/+191
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* | Merge branch 'maint'Martin Braun2015-02-171-10/+10
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| * b200: Revised configuration of AD9361 for master_clock_rates >56e6MHz. ↵Ian Buckley2015-02-171-10/+10
| | | | | | | | Issues #649 & #691
* | Merge branch 'maint'Martin Braun2015-02-121-20/+5
|\| | | | | | | | | Conflicts: host/examples/rx_samples_to_file.cpp
| * ad936x: removing gain_offset from rx set_gainJon Kiser2015-02-111-20/+5
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* | Merge branch 'maint'Martin Braun2015-01-271-1/+7
|\| | | | | | | | | Conflicts: host/docs/usrp_e3x0.dox
| * ad9361: Removed unnecessary digital TX attenuationAshish Chaudhari2015-01-231-1/+7
| | | | | | | | | | | | - Fix ported from He. The current TX filter does not need the additional -6dB of headroom. Set it to zero so we meet our max power specs.
| * fixup! ad9361: More check for interpolation/decim ratiosAshish Chaudhari2015-01-231-1/+1
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* | Merge branch 'maint'Martin Braun2015-01-232-7/+16
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| * | fixup! ad9361: More check for interpolation/decim ratiosAshish Chaudhari2015-01-231-1/+1
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| * ad9361: More check for interpolation/decim ratiosMartin Braun2015-01-232-7/+16
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* | ad9361: Added relative temperature sensorJulian Arnold2015-01-202-1/+52
|/ | | | This allows to read a relative temperature from an AD9361 device.
* ad9361: bugfix for ad9361 gain value truncationJon Kiser2015-01-202-6/+10
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* B200: Bug #656. Added FIR coeffs for filters with Fs/4 stop band.Ian Buckley2015-01-193-17/+62
| | | | AD9361 driver can now select coeffs for different interpolation ratios.
* ad9361: rssi readoutJulian Arnold2015-01-122-0/+25
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* ad9361: Made recommended rate a constantMartin Braun2014-09-022-1/+2
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* uhd: Changed line endings from Windows -> UNIXAshish Chaudhari2014-08-212-2039/+2039
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* ad9361: Output PLL lock status on ctrl output pins.Ashish Chaudhari2014-08-211-1/+1
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* ad9361: Fixed MSVC build issuesAshish Chaudhari2014-08-132-2034/+2039
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* ad9361: Fixed debug messages with UHD_LOGsAshish Chaudhari2014-08-131-19/+15
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* ad9361: Added synchronization to IO and device classesAshish Chaudhari2014-08-132-15/+30
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* ad9361: Cleaned up constants and macrosAshish Chaudhari2014-08-132-78/+65
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* ad9361: Cleaned up errors and debug messagesAshish Chaudhari2014-08-121-45/+46
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