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path: root/host/lib/usrp/common/ad9361_ctrl.hpp
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* Merge branch 'maint'Martin Braun2015-06-091-0/+3
|\ | | | | | | | | | | | | Conflicts: host/lib/usrp/common/ad9361_ctrl.hpp host/lib/usrp/common/ad9361_driver/ad9361_device.h host/lib/usrp/e300/e300_remote_codec_ctrl.hpp
| * B200/E300: Fix incorrect readback of frequency.michael-west2015-05-221-0/+3
| | | | | | | | When the LO is tuned it changes the frequency on both channels. The frequency value read back for the first channel was not updated when the LO frequency for the other channel was tuned to a different value.
* | b2xx: filter API implementation. Supports listing of RX/TX filters, querying ↵Julian Arnold2015-03-191-5/+13
| | | | | | | | RX/TX filter information and writing of analog and FIR filters
* | b2xx: AGC supportJulian Arnold2015-03-051-0/+6
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* | e3xx: support for dc offset and iq balance controlJulian Arnold2015-02-231-2/+11
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* | b2xx: dc offset and iq imbalance correction controlJulian Arnold2015-02-201-1/+14
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* | Merge branch 'maint'Martin Braun2015-02-121-1/+1
|\| | | | | | | | | Conflicts: host/examples/rx_samples_to_file.cpp
| * ad936x: removing gain_offset from rx set_gainJon Kiser2015-02-111-1/+1
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* | ad9361: Added relative temperature sensorJulian Arnold2015-01-201-0/+3
|/ | | | This allows to read a relative temperature from an AD9361 device.
* ad9361: rssi readoutJulian Arnold2015-01-121-1/+5
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* Added missing pure virtual destructors to base classesNicholas Corgan2014-09-011-1/+16
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* ad9361: Cleaned up constants and macrosAshish Chaudhari2014-08-131-5/+1
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* ad9361: Converted stdint types to boost typesAshish Chaudhari2014-08-121-2/+1
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* b200, ad9361: Cleanup up AD9361 driverAshish Chaudhari2014-08-121-30/+5
| | | | | - Removed transaction interface - Made the driver a C++ class
* b200: Moved AD9361 driver to hostAshish Chaudhari2014-08-011-48/+31
| | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
* b200: changed ad9361 ctrl/transaction magic number 64 to macro, as it is in ↵Balint Seeber2014-03-191-7/+9
| | | | the FX3 FW
* b200: throw exception when master clock rate (tick rate) is requested to be ↵Balint Seeber2014-02-141-1/+6
| | | | | | > max for certain # of channels (i.e. restrict to 30.72MHz for MIMO) Also includes sscanf type fix in b200_impl and longer timeout for AD9361 read
* b200: lower clock rate is 5MHz due to DCMJosh Blum2013-08-161-1/+2
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* b200: use existing query rate calls to clipJosh Blum2013-07-191-3/+3
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* uhd: squashed support modules for usrp3 fpga coresJosh Blum2013-07-191-0/+127