uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	Remove all boost:: namespace prefix for uint32_t, int32_t etc. (fixed-width ↵	Martin Braun	2016-11-08	1	-3/+3
\| \| \| \| \| \| \| \|	types) - Also removes all references to boost/cstdint.hpp and replaces it with stdint.h (The 'correct' replacement would be <cstdint>, but not all of our compilers support that).
*	ad9361: Added option for safe SPI	Jonathon Pendlum	2016-08-09	1	-1/+7
\| \| \| \|	- Also added check for reading chip ID
*	b200: Updated minimum clock rate to match DCM changes	Martin Braun	2015-10-14	1	-2/+4
\| \| \| \| \| \|	Lowest master clock rate is now 220 kHz. At low clock rates, the convergence time for the DC offset and quadrature calibration times is much larger, though.
*	B2XX: Added B200mini support	michael-west	2015-08-17	1	-0/+2
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*	ad9361/b200/e300: Refactored AD936x + perifs management	Martin Braun	2015-07-29	1	-3/+15
\| \| \| \| \| \|	- Created AD936x manager class - Moved functionality from B2x0 and E310 into manager - Separated property tree + perifs initialization in both device classes
*	Merge branch 'maint'	Martin Braun	2015-06-09	1	-0/+3
\|\ \| \| \| \| \| \| \| \| \| \| \| \|	Conflicts: host/lib/usrp/common/ad9361_ctrl.hpp host/lib/usrp/common/ad9361_driver/ad9361_device.h host/lib/usrp/e300/e300_remote_codec_ctrl.hpp
\| *	B200/E300: Fix incorrect readback of frequency.	michael-west	2015-05-22	1	-0/+3
\| \| \| \| \| \| \| \|	When the LO is tuned it changes the frequency on both channels. The frequency value read back for the first channel was not updated when the LO frequency for the other channel was tuned to a different value.
* \|	b2xx: filter API implementation. Supports listing of RX/TX filters, querying ↵	Julian Arnold	2015-03-19	1	-5/+13
\| \| \| \| \| \| \| \|	RX/TX filter information and writing of analog and FIR filters
* \|	b2xx: AGC support	Julian Arnold	2015-03-05	1	-0/+6
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* \|	e3xx: support for dc offset and iq balance control	Julian Arnold	2015-02-23	1	-2/+11
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* \|	b2xx: dc offset and iq imbalance correction control	Julian Arnold	2015-02-20	1	-1/+14
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* \|	Merge branch 'maint'	Martin Braun	2015-02-12	1	-1/+1
\|\\| \| \| \| \| \| \| \| \|	Conflicts: host/examples/rx_samples_to_file.cpp
\| *	ad936x: removing gain_offset from rx set_gain	Jon Kiser	2015-02-11	1	-1/+1
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* \|	ad9361: Added relative temperature sensor	Julian Arnold	2015-01-20	1	-0/+3
\|/ \| \| \|	This allows to read a relative temperature from an AD9361 device.
*	ad9361: rssi readout	Julian Arnold	2015-01-12	1	-1/+5
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*	Added missing pure virtual destructors to base classes	Nicholas Corgan	2014-09-01	1	-1/+16
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*	ad9361: Cleaned up constants and macros	Ashish Chaudhari	2014-08-13	1	-5/+1
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*	ad9361: Converted stdint types to boost types	Ashish Chaudhari	2014-08-12	1	-2/+1
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*	b200, ad9361: Cleanup up AD9361 driver	Ashish Chaudhari	2014-08-12	1	-30/+5
\| \| \| \| \|	- Removed transaction interface - Made the driver a C++ class
*	b200: Moved AD9361 driver to host	Ashish Chaudhari	2014-08-01	1	-48/+31
\| \| \| \| \| \| \|	- Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
*	b200: changed ad9361 ctrl/transaction magic number 64 to macro, as it is in ↵	Balint Seeber	2014-03-19	1	-7/+9
\| \| \| \|	the FX3 FW
*	b200: throw exception when master clock rate (tick rate) is requested to be ↵	Balint Seeber	2014-02-14	1	-1/+6
\| \| \| \| \| \|	> max for certain # of channels (i.e. restrict to 30.72MHz for MIMO) Also includes sscanf type fix in b200_impl and longer timeout for AD9361 read
*	b200: lower clock rate is 5MHz due to DCM	Josh Blum	2013-08-16	1	-1/+2
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*	b200: use existing query rate calls to clip	Josh Blum	2013-07-19	1	-3/+3
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*	uhd: squashed support modules for usrp3 fpga cores	Josh Blum	2013-07-19	1	-0/+127