aboutsummaryrefslogtreecommitdiffstats
path: root/host/lib/usrp/common/ad9361_ctrl.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'maint'Martin Braun2015-04-141-7/+1
|\ | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_io_impl.cpp host/lib/usrp/common/ad9361_driver/ad9361_device.cpp host/lib/usrp/common/ad9361_driver/ad9361_device.h
| * ad9361: Removed recommended max clock rate warningMartin Braun2015-04-141-7/+1
| |
* | b2xx: filter API implementation. Supports listing of RX/TX filters, querying ↵Julian Arnold2015-03-191-0/+34
| | | | | | | | RX/TX filter information and writing of analog and FIR filters
* | b2xx: AGC supportJulian Arnold2015-03-051-0/+21
| |
* | e3xx: support for dc offset and iq balance controlJulian Arnold2015-02-231-13/+0
| |
* | b2xx: dc offset and iq imbalance correction controlJulian Arnold2015-02-201-0/+28
| |
* | ad9361: Added relative temperature sensorJulian Arnold2015-01-201-0/+6
|/ | | | This allows to read a relative temperature from an AD9361 device.
* B200: Bug #656. Added FIR coeffs for filters with Fs/4 stop band.Ian Buckley2015-01-191-0/+7
| | | | AD9361 driver can now select coeffs for different interpolation ratios.
* ad9361: rssi readoutJulian Arnold2015-01-121-1/+10
|
* ad9361: Made recommended rate a constantMartin Braun2014-09-021-2/+2
|
* Added missing pure virtual destructors to base classesNicholas Corgan2014-09-011-1/+14
|
* ad9361: Fixed TX direction bug in ad9361_ctrlAshish Chaudhari2014-08-131-1/+1
|
* ad9361: Added synchronization to IO and device classesAshish Chaudhari2014-08-131-5/+6
|
* ad9361: Converted stdint types to boost typesAshish Chaudhari2014-08-121-20/+20
|
* b200, ad9361: Cleanup up AD9361 driverAshish Chaudhari2014-08-121-186/+59
| | | | | - Removed transaction interface - Made the driver a C++ class
* b200: Moved AD9361 driver to hostAshish Chaudhari2014-08-011-33/+171
| | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
* b200: changed ad9361 read timeout handling (kicks in when requesting ↵Balint Seeber2014-03-191-1/+1
| | | | master_clock_rate above 56MHz)
* uhd: strnlen for platforms w/o itJosh Blum2013-07-251-1/+9
|
* b200: use existing query rate calls to clipJosh Blum2013-07-191-2/+2
|
* uhd: squashed support modules for usrp3 fpga coresJosh Blum2013-07-191-0/+165