Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | b200: Moved AD9361 driver to host | Ashish Chaudhari | 2014-08-01 | 1 | -33/+171 |
| | | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow | ||||
* | b200: changed ad9361 read timeout handling (kicks in when requesting ↵ | Balint Seeber | 2014-03-19 | 1 | -1/+1 |
| | | | | master_clock_rate above 56MHz) | ||||
* | uhd: strnlen for platforms w/o it | Josh Blum | 2013-07-25 | 1 | -1/+9 |
| | |||||
* | b200: use existing query rate calls to clip | Josh Blum | 2013-07-19 | 1 | -2/+2 |
| | |||||
* | uhd: squashed support modules for usrp3 fpga cores | Josh Blum | 2013-07-19 | 1 | -0/+165 |