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path: root/host/lib/usrp/common/ad9361_ctrl.cpp
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* b200: Moved AD9361 driver to hostAshish Chaudhari2014-08-011-33/+171
| | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
* b200: changed ad9361 read timeout handling (kicks in when requesting ↵Balint Seeber2014-03-191-1/+1
| | | | master_clock_rate above 56MHz)
* uhd: strnlen for platforms w/o itJosh Blum2013-07-251-1/+9
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* b200: use existing query rate calls to clipJosh Blum2013-07-191-2/+2
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* uhd: squashed support modules for usrp3 fpga coresJosh Blum2013-07-191-0/+165