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* - Fixes for channel alignmentmichael-west2014-08-181-5/+0
| | | | | | | | | | - Added analog delay for radio clock - Added analog delay for DAC reference clocks - Removed resetting of clock control - Removed setting of reference clock and PPS to external sources during initialization - Fixes for set_time_unknown_pps - Removed wait for PPS edge after setting time from GPSDO - Changed set_time_unknonw_pps to time out based on system time rather than device VITA time
* Merge branch 'maint' into uhd/bug492michael-west2014-07-301-13/+19
|\ | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.cpp
| * Merge branch 'origin/b200/bug516' into maintBen Hilburn2014-07-171-4/+4
| |\ | | | | | | | | | Fixing B200 clock rate float compare.
| | * BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-07-101-1/+1
| | | | | | | | | | | | - Addressed feedback from review.
| | * Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-06-181-3/+3
| | | | | | | | | | | | - Corrected clock rate checks for B2x0
| | * Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-06-181-3/+3
| | | | | | | | | | | | - Corrected clock rate checks for B2x0
| * | Merge branch 'origin/b200/bug512' into maintBen Hilburn2014-07-171-9/+15
| |\ \ | | |/ | |/| | | | B200 now creates internal PPS. Depends on FPGA change.
| | * Enhancement #512: B210: Need an Internal PPSmichael-west2014-06-131-9/+15
| | | | | | | | | | | | - Added support for internal PPS selection (set as default)
* | | Fix for BUG #492: UHD: set_time_unknown_pps() fails with GPSDO installedmichael-west2014-06-251-0/+5
|/ / | | | | | | - Added polling for PPS time change after setting time from GPSDO.
* / Fix for BUG #500: B210: RX channels are not phase alignedmichael-west2014-06-061-0/+1
|/ | | | - Adding UHD side code to invert second RX channel
* Merge branch 'origin/b200/issue_418'Ben Hilburn2014-04-101-5/+6
|\ | | | | | | Fixing unsafe sscanf call.
| * b100+b200+usrp1: removed potentially unsafe sscanf callMartin Braun2014-04-101-5/+6
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* | b200: Added max link rate infoMartin Braun2014-04-102-1/+4
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* Merge branch adding warning regarding MCR on the B2xx.Ben Hilburn2014-03-274-14/+110
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| * b200: changed ad9361 ctrl/transaction magic number 64 to macro, as it is in ↵Balint Seeber2014-03-191-3/+3
| | | | | | | | the FX3 FW
| * b200: explicitly detect libusb timeoutBalint Seeber2014-03-191-8/+19
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| * b200: changed ad9361 read timeout handling (kicks in when requesting ↵Balint Seeber2014-03-191-3/+10
| | | | | | | | master_clock_rate above 56MHz)
| * b200: addressed review comments (boost::uint16_t & source code long line ↵Balint Seeber2014-03-191-6/+19
| | | | | | | | breaking)
| * Merge branch 'master' of github.com:EttusResearch/uhddev into b200/warn_mimo_mcrBalint Seeber2014-02-201-1/+1
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| * | b200: throw exception when master clock rate (tick rate) is requested to be ↵Balint Seeber2014-02-144-8/+73
| | | | | | | | | | | | | | | | | | > max for certain # of channels (i.e. restrict to 30.72MHz for MIMO) Also includes sscanf type fix in b200_impl and longer timeout for AD9361 read
* | | b200: update FPGA loading percentage every 1% instead of 10%Nicholas Corgan2014-03-271-1/+1
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* | | Pulling in patch from Marcus Leech for includes and older OSes.Ben Hilburn2014-03-261-0/+6
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* | | b200: Added missing include to b200_implMoritz Fischer2014-03-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | * In order to use std::ceil and std::floor, on older compilers we need to still add an include for cmath. Tested-by: Marcus D. Leech <mleech@ripnet.com> Signed-off-by: Moritz Fischer <moritz@ettus.com>
* | | b200: Added channel mapping capabilitiesMartin Braun2014-02-253-47/+42
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* | b200: Fixed bug in rx_dsp_core_3000 that would assume 3 halfbands and X300 ↵Ashish Chaudhari2014-02-191-1/+1
|/ | | | settings interface.
* Merging USRP X300 and X310 support!!Ben Hilburn2014-02-042-14/+8
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* Added timed control commands to test_timed_commands example. Added radio ↵Michael West2014-01-151-0/+2
| | | | core as subscriber to tick rate change for B200.
* Merging mwest's improvements to B2xx utility.Ben Hilburn2013-12-112-0/+25
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* Merge of mwest's fix to the sse2_fc32_to_sc16 converter.Ben Hilburn2013-12-111-18/+19
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* lib: fixed use of -> to . after switching parameter from pointer to referenceNicholas Corgan2013-12-031-1/+1
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* Final merge of Balint's 'kitchen_sink' B200 fixes.Ben Hilburn2013-11-273-83/+177
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* Squashed merge of Coverity fixes.Ben Hilburn2013-11-271-4/+13
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* b200: fix loopback transfer timeout when operating at USB2release_003_006_001Balint Seeber2013-11-201-1/+2
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* b200: check return value from control write of FPGA bitstream for short transferrelease_003_006_000Balint Seeber2013-11-191-0/+2
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* b200: extra check on loopback request to determine VREQ transfer sizeBalint Seeber2013-11-191-0/+2
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* b200: auto-select VREQ xfer size regardless of FW versionBalint Seeber2013-11-191-5/+13
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* Merge branch 'bug182'Nicholas Corgan2013-11-194-13/+28
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| * More cleanup for dynamic linking.Michael West2013-11-181-1/+1
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| * BUG #182: Cleaned up for proper dynamic linking of libuhd.Michael West2013-11-182-6/+6
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| * BUG #182: Refactored b2xx_fx3_utils to use files from UHDMichael West2013-11-153-8/+23
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* | b200: Reverted RX SPP 2044 -> 2000 (unresolved issue with one app, wait for ↵Balint Seeber2013-11-191-1/+1
| | | | | | | | FPGA bump)
* | Merge remote-tracking branch 'origin/b200/dtor-master' into b200/kitchen_sinkBalint Seeber2013-11-193-10/+28
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| * | b200/dtor-stall: final fixes for stall bugJohannes Demel2013-11-191-4/+5
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| * | b200/dtor-stall: fixed bug that stalled b200 on shutdown.Johannes Demel2013-11-193-9/+26
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* | b200: increase FPGA VREQ transfer size to 512 if operating over USB3Balint Seeber2013-11-191-3/+17
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* | BUG #183: Addressed comments from code review.Michael West2013-11-191-1/+1
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* | BUG #183: B200 High CPU Usage: Created a single thread to handle libusb ↵Michael West2013-11-081-2/+2
|/ | | | events and expanded packet size to 16k
* uhd: wb_iface is now a public interfaceJosh Blum2013-10-041-2/+2
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* b200: when images aren't found, prompt user to use images downloaderNicholas Corgan2013-09-111-2/+2
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* b200: firmware update changed for FPGA load workBen Hilburn2013-09-104-14/+50
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