| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | b200: Added lo_locked sensor | Martin Braun | 2015-01-14 | 1 | -0/+1 |
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| * | b200: Added variable rate SPI core for AD9361 and ADF4001 | Ashish Chaudhari | 2014-08-01 | 1 | -0/+1 |
| | | | | | | - Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz | ||||
| * | b200: Moved AD9361 driver to host | Ashish Chaudhari | 2014-08-01 | 1 | -0/+1 |
| | | | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow | ||||
| * | b200: integrate support for new converters | Josh Blum | 2013-09-04 | 1 | -0/+2 |
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| * | b200: changed for pps select register | Josh Blum | 2013-08-13 | 1 | -0/+1 |
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| * | b200: squashed support for b200 onto master branch | Josh Blum | 2013-07-19 | 1 | -0/+119 |
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