uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	b200: Changed the max byte rate over USB2	Marcus Müller	2015-05-06	1	-2/+1
\| \| \| \| \|	Max rate is now set to 53248000, allowing for more than 8MS/s, which is closer to the actual value that USB2 can handle.
*	b200: Added convenience subdev override for consistent subdev experience	Martin Braun	2015-04-27	1	-0/+2
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*	b200: Fixed FE swapping register	Martin Braun	2015-04-24	1	-2/+2
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*	b200: Bumped FPGA compat number to 6	Ashish Chaudhari	2015-04-23	1	-1/+1
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*	B200: Bumped FPGA compat number to 5	michael-west	2015-04-17	1	-2/+3
\| \| \| \|	B200: Added bit to SR_MISC_OUT register to control ATR mapping from radio to frontend
*	b2x0: Cleaned up device lookup (moved all constants to one place)	Martin Braun	2015-04-16	1	-0/+2
\| \| \| \| \| \|	Conflicts: host/lib/usrp/b200/b200_iface.hpp host/lib/usrp/b200/b200_impl.cpp
*	B200: Stricter checking of product and revision for frontend mapping.	michael-west	2015-04-15	1	-4/+7
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*	UHD host code changes for B200 rev 5 support.	michael-west	2015-04-15	1	-0/+4
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*	Merging new UHD_IMAGES_DIR utilities and bug fixes.	Ben Hilburn	2015-01-27	1	-3/+3
\| \| \| \|	Also includes NI-USRP Windows Registry Key fixes.
*	b200: Added lo_locked sensor	Martin Braun	2015-01-14	1	-0/+1
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*	b200: serialized access to get_rx/tx_stream	Julian Arnold	2014-11-21	1	-0/+2
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*	b200: Bumped FX3 firmware compat number to 7.	Ashish Chaudhari	2014-10-01	1	-1/+1
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*	b200: Set sensible defaults for freq, gain and rate at startup	Martin Braun	2014-09-02	1	-0/+4
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*	b200, ad9361: Cleanup up AD9361 driver	Ashish Chaudhari	2014-08-12	1	-1/+1
\| \| \| \| \|	- Removed transaction interface - Made the driver a C++ class
*	b200: Removed all AD9361 related firmware	Ashish Chaudhari	2014-08-12	1	-1/+1
\| \| \| \| \| \| \|	- FX3 does not respond to AD9361 firmware transaction VREQs - FX3 does not respond to AD9361 SPI transaction VREQs - Deleted all AD9361 firmware files - Bumped FW compat to 6
*	b200: Added variable rate SPI core for AD9361 and ADF4001	Ashish Chaudhari	2014-08-01	1	-1/+2
\| \| \| \| \|	- Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz
*	b200: Moved AD9361 driver to host	Ashish Chaudhari	2014-08-01	1	-2/+2
\| \| \| \| \| \| \|	- Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
*	b200: Added max link rate info	Martin Braun	2014-04-10	1	-1/+3
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*	Merge branch adding warning regarding MCR on the B2xx.	Ben Hilburn	2014-03-27	1	-4/+7
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\| *	b200: throw exception when master clock rate (tick rate) is requested to be ↵	Balint Seeber	2014-02-14	1	-4/+7
\| \| \| \| \| \| \| \| \| \| \| \|	> max for certain # of channels (i.e. restrict to 30.72MHz for MIMO) Also includes sscanf type fix in b200_impl and longer timeout for AD9361 read
* \|	b200: Added channel mapping capabilities	Martin Braun	2014-02-25	1	-4/+7
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*	Merging USRP X300 and X310 support!!	Ben Hilburn	2014-02-04	1	-10/+4
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*	Final merge of Balint's 'kitchen_sink' B200 fixes.	Ben Hilburn	2013-11-27	1	-2/+2
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*	Merge branch 'bug182'	Nicholas Corgan	2013-11-19	1	-4/+0
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\| *	BUG #182: Cleaned up for proper dynamic linking of libuhd.	Michael West	2013-11-18	1	-4/+0
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* \|	b200/dtor-stall: fixed bug that stalled b200 on shutdown.	Johannes Demel	2013-11-19	1	-2/+2
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*	uhd: wb_iface is now a public interface	Josh Blum	2013-10-04	1	-2/+2
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*	b200: firmware update changed for FPGA load work	Ben Hilburn	2013-09-10	1	-1/+1
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*	b200: changed for pps select register	Josh Blum	2013-08-13	1	-1/+1
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*	b200: squashed support for b200 onto master branch	Josh Blum	2013-07-19	1	-0/+196