| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | B2xx: Added B205mini support. | michael-west | 2015-12-10 | 1 | -1/+2 |
| | | | | | | | - Add support to b200_impl - New INF file - Removed references to old 'B205' name | ||||
| * | b2xx,e3xx,x300: Bumped FPGA compat numbers after SW time-sync changes | Ashish Chaudhari | 2015-12-10 | 1 | -2/+2 |
| | | | | | | | | - b200: compat 13 - b200mini: compat 4 - e3xx: compat 14 - x3xx: compat 19 | ||||
| * | Bumped FPGA compat numbers for B200, X300, and E300. | michael-west | 2015-12-10 | 1 | -1/+1 |
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| * | B200/E300: Set time sync on clock rate change to current time of first radio | michael-west | 2015-12-10 | 1 | -1/+2 |
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| * | B210: Add VITA time synchronization on internal signal | michael-west | 2015-12-10 | 1 | -0/+1 |
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| * | b2xx,e3xx,x300: Bumped compat numbers for 3.9.1 UHD release | Ashish Chaudhari | 2015-09-03 | 1 | -2/+2 |
| | | | | | | | | - b200: compat 11 - b200mini: compat 2 - e300: compat 11 - x300: compat 15 | ||||
| * | b2xx: Removed DCM reset bit (obsolete) | Martin Braun | 2015-09-03 | 1 | -2/+1 |
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| * | B2XX: Added B200mini support | michael-west | 2015-08-17 | 1 | -3/+8 |
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| * | b200,e300,x300: Updated compat number for release 3.9.0 | Ashish Chaudhari | 2015-08-14 | 1 | -1/+1 |
| | | | | | | | - b200: compat 10 - e300: compat 10 - x300: compat 14 | ||||
| * | b200: Change init sequence to catch bad USB states | Balint Seeber | 2015-08-03 | 1 | -1/+11 |
| | | | | | | - Fixes USB hang issues on OS X - Uses usb_errors | ||||
| * | ad9361/b200/e300: Refactored AD936x + perifs management | Martin Braun | 2015-07-29 | 1 | -7/+2 |
| | | | | | | | - Created AD936x manager class - Moved functionality from B2x0 and E310 into manager - Separated property tree + perifs initialization in both device classes | ||||
| * | b200: Change default tick rate to 16 MHz | Martin Braun | 2015-07-24 | 1 | -1/+1 |
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| * | Added uhd::image_loader class and uhd_image_loader utility | Nicholas Corgan | 2015-07-15 | 1 | -3/+13 |
| | | | | | | | * Single class for loading firmware/FPGA images onto devices instead of multiple utilities * Loading functions are registered for each device, corresponding to their --args="type=foo" name * Deprecation warnings added to all product-specific image loading utilities | ||||
| * | Updated compat numbers for B2x0 and X3x0 | Martin Braun | 2015-07-14 | 1 | -1/+1 |
| | | | | | | - B2x0: FW compat number (goes with previous firmware update) - X3x0: Max HW rev number | ||||
| * | Merge branch 'maint' | Martin Braun | 2015-07-14 | 1 | -1/+1 |
| |\ | | | | | | | | | | | | | | | | | | | Conflicts: fpga-src host/CMakeLists.txt host/cmake/Modules/UHDVersion.cmake host/lib/usrp/b200/b200_impl.hpp host/lib/usrp/e300/e300_fpga_defs.hpp host/lib/usrp/x300/x300_fw_common.h | ||||
| | * | b200: Bumped FPGA compat number to 8 for release | Ashish Chaudhari | 2015-07-14 | 1 | -1/+1 |
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| | * | b200: Modify initialization sequence to avoid warnings | Martin Braun | 2015-06-29 | 1 | -1/+2 |
| | | | | | | | | | | | | | | | | | | | | | This will set the actual default rate to an integer factor of whatever the tick rate is, but leave the property tree value at zero. This avoids warnings if the chosen tick rate is not a multiple of the previous default rate, but also returns a zero value for the rate when it has not been initialized, allowing the user to probe if the value has not yet been set. | ||||
| * | | b200: Modify initialization sequence to avoid warnings | Martin Braun | 2015-06-29 | 1 | -1/+2 |
| | | | | | | | | | | | | | | | | | | | | | This will set the actual default rate to an integer factor of whatever the tick rate is, but leave the property tree value at zero. This avoids warnings if the chosen tick rate is not a multiple of the previous default rate, but also returns a zero value for the rate when it has not been initialized, allowing the user to probe if the value has not yet been set. | ||||
| * | | Merge branch 'maint' | Martin Braun | 2015-05-11 | 1 | -2/+1 |
| |\| | | | | | | | | | | | | | Conflicts: fpga-src host/CMakeLists.txt host/cmake/Modules/UHDVersion.cmake | ||||
| | * | b200: Changed the max byte rate over USB2 | Marcus Müller | 2015-05-06 | 1 | -2/+1 |
| | | | | | | | | | | | Max rate is now set to 53248000, allowing for more than 8MS/s, which is closer to the actual value that USB2 can handle. | ||||
| * | | Merge branch 'maint' | Martin Braun | 2015-04-27 | 1 | -0/+2 |
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| | * | b200: Added convenience subdev override for consistent subdev experience | Martin Braun | 2015-04-27 | 1 | -0/+2 |
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| * | | Merge branch 'maint' | Martin Braun | 2015-04-24 | 1 | -2/+2 |
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| | * | b200: Fixed FE swapping register | Martin Braun | 2015-04-24 | 1 | -2/+2 |
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| * | | b200: Bumped FPGA compat number to 7. | Ashish Chaudhari | 2015-04-23 | 1 | -1/+1 |
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| * | | Merge branch 'maint' | Ashish Chaudhari | 2015-04-23 | 1 | -2/+10 |
| |\| | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.cpp host/lib/usrp/b200/b200_impl.hpp | ||||
| | * | b200: Bumped FPGA compat number to 6 | Ashish Chaudhari | 2015-04-23 | 1 | -1/+1 |
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| | * | B200: Bumped FPGA compat number to 5 | michael-west | 2015-04-17 | 1 | -2/+3 |
| | | | | | | | | | B200: Added bit to SR_MISC_OUT register to control ATR mapping from radio to frontend | ||||
| | * | b2x0: Cleaned up device lookup (moved all constants to one place) | Martin Braun | 2015-04-16 | 1 | -0/+2 |
| | | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_iface.hpp host/lib/usrp/b200/b200_impl.cpp | ||||
| | * | B200: Stricter checking of product and revision for frontend mapping. | michael-west | 2015-04-15 | 1 | -4/+7 |
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| | * | UHD host code changes for B200 rev 5 support. | michael-west | 2015-04-15 | 1 | -0/+4 |
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| | * | Merging new UHD_IMAGES_DIR utilities and bug fixes. | Ben Hilburn | 2015-01-27 | 1 | -3/+3 |
| | | | | | | | | | Also includes NI-USRP Windows Registry Key fixes. | ||||
| * | | b2x0: Cleaned up device lookup (moved all constants to one place) | Martin Braun | 2015-04-21 | 1 | -0/+2 |
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| * | | b200: Bumped FPGA compat number to 5 | Ashish Chaudhari | 2015-04-02 | 1 | -1/+1 |
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| * | | B200: UHD support for FPGPIO connector on REV6+ boards. | Ian Buckley | 2015-03-09 | 1 | -1/+6 |
| | | | | | | | | | | | | | - GPIO on UART connector all board Revs - Consolidated fpgpio_bitbang into fpgpio example and renamed it gpio - Changed FP_GPIO readback address to match X300 | ||||
| * | | Merge branch 'maint' | Martin Braun | 2015-01-14 | 1 | -0/+1 |
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| | * | b200: Added lo_locked sensor | Martin Braun | 2015-01-14 | 1 | -0/+1 |
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| * | | uhd: replaced the `images_error` with a generic utility error | Ben Hilburn | 2014-11-21 | 1 | -3/+3 |
| | | | | | | | | | | | | | - Deleted images.*, moved functionality to paths.* - Applies for all devices that check FPGA or FW compat numbers - Adds generic utility search tool | ||||
| * | | Merge branch 'maint' | Martin Braun | 2014-11-21 | 1 | -0/+5 |
| |\| | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.hpp | ||||
| | * | b200: serialized access to get_rx/tx_stream | Julian Arnold | 2014-11-21 | 1 | -0/+2 |
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| * | | b200: Make the master clock rate auto-configurable | Martin Braun | 2014-11-20 | 1 | -5/+53 |
| |/ | | | | | | | | | | When no master_clock_rate is defined, the B200 driver will now select a suitable clock rate automatically based on the selected sampling rate. The selected tick rate is a multiple of the LCM of tx and rx rates. Auto-setting is done every time a streamer is generated or the sampling rate is configured. | ||||
| * | b200: Bumped FX3 firmware compat number to 7. | Ashish Chaudhari | 2014-10-01 | 1 | -1/+1 |
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| * | b200: Set sensible defaults for freq, gain and rate at startup | Martin Braun | 2014-09-02 | 1 | -0/+4 |
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| * | b200, ad9361: Cleanup up AD9361 driver | Ashish Chaudhari | 2014-08-12 | 1 | -1/+1 |
| | | | | | | - Removed transaction interface - Made the driver a C++ class | ||||
| * | b200: Removed all AD9361 related firmware | Ashish Chaudhari | 2014-08-12 | 1 | -1/+1 |
| | | | | | | | | - FX3 does not respond to AD9361 firmware transaction VREQs - FX3 does not respond to AD9361 SPI transaction VREQs - Deleted all AD9361 firmware files - Bumped FW compat to 6 | ||||
| * | b200: Added variable rate SPI core for AD9361 and ADF4001 | Ashish Chaudhari | 2014-08-01 | 1 | -1/+2 |
| | | | | | | - Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz | ||||
| * | b200: Moved AD9361 driver to host | Ashish Chaudhari | 2014-08-01 | 1 | -2/+2 |
| | | | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow | ||||
| * | b200: Added max link rate info | Martin Braun | 2014-04-10 | 1 | -1/+3 |
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| * | Merge branch adding warning regarding MCR on the B2xx. | Ben Hilburn | 2014-03-27 | 1 | -4/+7 |
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| | * | b200: throw exception when master clock rate (tick rate) is requested to be ↵ | Balint Seeber | 2014-02-14 | 1 | -4/+7 |
| | | | | | | | | | | | | | > max for certain # of channels (i.e. restrict to 30.72MHz for MIMO) Also includes sscanf type fix in b200_impl and longer timeout for AD9361 read | ||||
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