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path: root/host/lib/usrp/b200/b200_impl.cpp
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* B200/E300: Fix incorrect readback of frequency.michael-west2015-05-221-0/+1
| | | | When the LO is tuned it changes the frequency on both channels. The frequency value read back for the first channel was not updated when the LO frequency for the other channel was tuned to a different value.
* B200: Made find function properly ignore missing "product" value (BUG #770)michael-west2015-05-051-3/+1
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* b200: Fixed compiler warningMartin Braun2015-04-301-2/+2
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* b200: Added convenience subdev override for consistent subdev experienceMartin Braun2015-04-271-6/+9
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* b200: Fixed FE swapping registerMartin Braun2015-04-241-3/+17
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* B200: Bumped FPGA compat number to 5michael-west2015-04-171-3/+4
| | | | B200: Added bit to SR_MISC_OUT register to control ATR mapping from radio to frontend
* b2x0: Cleaned up device lookup (moved all constants to one place)Martin Braun2015-04-161-39/+45
| | | | | | Conflicts: host/lib/usrp/b200/b200_iface.hpp host/lib/usrp/b200/b200_impl.cpp
* B200: Stricter checking of product and revision for frontend mapping.michael-west2015-04-151-7/+8
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* UHD host code changes for B200 rev 5 support.michael-west2015-04-151-13/+22
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* B200: Change Catalina Reg 0x06 for RX data setup/hold timing issue @ ↵Ian Buckley2015-04-061-1/+1
| | | | 30.72MHz. Issue #726
* Warning fixesNicholas Corgan2015-03-271-2/+2
| | | | | | | * CMake now not applying C++ flags to C files * GCC 4.4: anti-aliasing rules * MSVC: narrowing, differences in subclass function parameters * Clang: uninitialized variables
* b200: Fixed var name typoMartin Braun2015-03-131-1/+1
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* uhd: Fixed multiple compiler warnings (unused variables, missing literal f)Martin Braun2015-03-111-1/+1
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* b200: Initialize _tick_rate properly to force tick rate updateMartin Braun2015-03-111-1/+2
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* b200: Bugfix#692: b200_find now returns an empty device vector when hint ↵mcrymble2015-02-061-1/+3
| | | | contains addr0/resource0/etc style keys.
* Merging new UHD_IMAGES_DIR utilities and bug fixes.Ben Hilburn2015-01-271-13/+11
| | | | Also includes NI-USRP Windows Registry Key fixes.
* b200: Added lo_locked sensorMartin Braun2015-01-141-1/+10
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* b200: rssi sensorJulian Arnold2015-01-121-1/+3
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* b200: select valid 10 MHz ref (update GPIO) *before* updating ADF4001 ↵Balint Seeber2014-12-081-3/+4
| | | | external ref selection
* MISO and SIMO configurations no longer allowedJulian Arnold2014-10-211-0/+5
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* Merge branch 'maint'Martin Braun2014-09-251-0/+15
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| * B200: added support for reading the exact product name from EEPROM for B200 ↵Neel Pandeya2014-09-251-0/+15
| | | | | | | | and B210
* | Merge branch 'maint'Martin Braun2014-09-231-1/+0
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| * usrp: don't print duplicate GPSDO detection messagesNicholas Corgan2014-09-231-1/+0
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* | b200: Set sensible defaults for freq, gain and rate at startupMartin Braun2014-09-021-5/+15
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* | Merge branch 'master' into ashish/cat_refactor_phase2Ashish Chaudhari2014-08-201-5/+0
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| * | Merge branch 'maint'Martin Braun2014-08-181-5/+0
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| | * - Fixes for channel alignmentmichael-west2014-08-181-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Added analog delay for radio clock - Added analog delay for DAC reference clocks - Removed resetting of clock control - Removed setting of reference clock and PPS to external sources during initialization - Fixes for set_time_unknown_pps - Removed wait for PPS edge after setting time from GPSDO - Changed set_time_unknonw_pps to time out based on system time rather than device VITA time
* | | ad9361: Cleaned up constants and macrosAshish Chaudhari2014-08-131-1/+1
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* | | b200, ad9361: Cleanup up AD9361 driverAshish Chaudhari2014-08-121-2/+29
|/ / | | | | | | | | - Removed transaction interface - Made the driver a C++ class
* | Merge branch 'master' into ashish/cat_refactor_masterAshish Chaudhari2014-08-051-0/+5
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| * | Merge branch 'maint'Martin Braun2014-07-311-0/+5
| |\| | | | | | | | | | | | | Conflicts: host/utils/usrp_burn_mb_eeprom.cpp
| | * Merge branch 'maint' into uhd/bug492michael-west2014-07-301-13/+19
| | |\ | | | | | | | | | | | | | | | | Conflicts: host/lib/usrp/b200/b200_impl.cpp
| | * | Fix for BUG #492: UHD: set_time_unknown_pps() fails with GPSDO installedmichael-west2014-06-251-0/+5
| | | | | | | | | | | | | | | | - Added polling for PPS time change after setting time from GPSDO.
* | | | b200: Added variable rate SPI core for AD9361 and ADF4001Ashish Chaudhari2014-08-011-3/+3
| | | | | | | | | | | | | | | | | | | | - Added b200_local_spi core that adjusts the divider when talking to the two chips - AD9361 rate is 1MHz and ADF4001 rate is 10kHz
* | | | b200: Moved AD9361 driver to hostAshish Chaudhari2014-08-011-8/+9
|/ / / | | | | | | | | | | | | | | | | | | - Switched to FPGA SPI engine - Moved firmware AD9361 driver to UHD - Bumped FW compat to 5, FPGA compat to 4 - Known Issue: AD9361 SPI rate is too slow
* | / OctoClock firmware upgrade, added host driverNicholas Corgan2014-07-231-1/+2
| |/ |/| | | | | | | | | | | | | | | | | * OctoClock can communicate with UHD over Ethernet * Can read NMEA strings from GPSDO and send to host * Added multi_usrp_clock class for clock devices * uhd::device can now filter to return only USRP devices or clock devices * New OctoClock bootloader can accept firmware download over Ethernet * Added octoclock_burn_eeprom,octoclock_firmware_burner utilities * Added test_clock_synch example to show clock API
* | Merge branch 'origin/b200/bug516' into maintBen Hilburn2014-07-171-4/+4
|\ \ | | | | | | | | | Fixing B200 clock rate float compare.
| * | BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-07-101-1/+1
| | | | | | | | | | | | - Addressed feedback from review.
| * | Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-06-181-3/+3
| | | | | | | | | | | | - Corrected clock rate checks for B2x0
| * | Fix for BUG #516: B210: Fails to Run with 30.72 MHz Clockmichael-west2014-06-181-3/+3
| |/ | | | | | | - Corrected clock rate checks for B2x0
* | Merge branch 'origin/b200/bug512' into maintBen Hilburn2014-07-171-9/+15
|\ \ | |/ |/| | | B200 now creates internal PPS. Depends on FPGA change.
| * Enhancement #512: B210: Need an Internal PPSmichael-west2014-06-131-9/+15
| | | | | | | | - Added support for internal PPS selection (set as default)
* | Fix for BUG #500: B210: RX channels are not phase alignedmichael-west2014-06-061-0/+1
|/ | | | - Adding UHD side code to invert second RX channel
* Merge branch 'origin/b200/issue_418'Ben Hilburn2014-04-101-5/+6
|\ | | | | | | Fixing unsafe sscanf call.
| * b100+b200+usrp1: removed potentially unsafe sscanf callMartin Braun2014-04-101-5/+6
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* | b200: Added max link rate infoMartin Braun2014-04-101-0/+1
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* Merge branch adding warning regarding MCR on the B2xx.Ben Hilburn2014-03-271-4/+35
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| * b200: addressed review comments (boost::uint16_t & source code long line ↵Balint Seeber2014-03-191-6/+19
| | | | | | | | breaking)
| * Merge branch 'master' of github.com:EttusResearch/uhddev into b200/warn_mimo_mcrBalint Seeber2014-02-201-1/+1
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