aboutsummaryrefslogtreecommitdiffstats
path: root/host/lib/usrp/b100/b100_impl.cpp
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'maint34' into maintNicholas Corgan2012-11-161-3/+0
|\ | | | | | | | | | | Conflicts: host/lib/usrp/b100/b100_impl.cpp host/lib/usrp/usrp1/usrp1_impl.hpp
| * lib/cmake: CPack source workNicholas Corgan2012-11-161-3/+0
| | | | | | | | | | * Removed all host code dependencies on firmware headers * Put in CMake settings for CPack source
* | lfrx: disable dc offset correction when using LFRXJosh Blum2012-09-281-0/+3
| |
* | b100/e100: clock source option for pps phase sync abuseJosh Blum2012-07-191-0/+13
| |
* | b100: squashed host code for fifo control/timed commandsJosh Blum2012-07-021-37/+54
| | | | | | | | | | This uses the new b100/e100 common core and FIFO control modules. Subsequent commit will be the compatible FPGA merge.
* | utils: UHD Image Downloader - downloads firmware/FPGA images compatible with ↵Nicholas Corgan2012-06-071-8/+8
| | | | | | | | the current host code and places them in the images directory
* | usrp: mboard eeprom map use string as keyJosh Blum2012-05-141-3/+3
| |
* | mboard id's are now more concise (codenames are separated, for example), and ↵Nicholas Corgan2012-04-201-1/+2
|/ | | | dboard subdev names are more descriptive (RFX RX is now RFX1200 RX, etc)
* B100: enable_gpif(0) disables FIFO output clock on FX2. this prevents the ↵Nick Foster2012-03-161-2/+2
| | | | "stuffing zeroes" problem and improves transport reliability.
* usrp: fix from "rev iq correction"Josh Blum2012-03-161-2/+2
| | | | Must zero out the default IQ correction to have zero effect by default.
* usrp: reset cordics on init after tick rate updateJosh Blum2012-02-281-0/+8
|
* uhd: fixed some compile warnings for msvcJosh Blum2012-02-281-1/+1
|
* b100: reset/reenumerate fx2 for bad endpoint stateJosh Blum2012-02-141-0/+19
| | | | | | Determine state of control endpoint, re-enumerate to put in a known state, rerun some initialization code.
* b100: added transport flushes and moved around reset codeJosh Blum2012-02-141-11/+4
|
* B100: Firmware reset tweaks.Nick Foster2012-02-091-1/+1
|
* dsp rework: implement 64 bit ticks, no secondsJosh Blum2012-02-061-4/+4
|
* B100: use FPGA external reset on initNick Foster2012-02-061-0/+6
|
* dsp rework: work on usb wrapper for smaller packets, large lutsJosh Blum2012-02-021-2/+3
|
* gen2: added user setting regs api and user coreJosh Blum2012-01-311-0/+7
|
* usrp1/b100: reenumeration loop with timeout only when foundJosh Blum2012-01-271-1/+3
|
* usrp1/b100: handle longer reenumerations with loop and timeoutJosh Blum2012-01-261-17/+25
|
* b100: tweaks for fpga resets on initJosh Blum2011-11-221-11/+8
|
* uhd: support for applying cal corrections B100Josh Blum2011-11-151-0/+21
|
* usrp: fixed default initialization of iq bal correctionJosh Blum2011-11-131-2/+2
|
* usrp: work on dboard code to use subtrees to populate frontend propsJosh Blum2011-11-071-17/+4
|
* e100/b100: init tree before filling itJosh Blum2011-11-041-1/+1
| | | | git log
* e100/b100: moved gpio regs and compat readbackJosh Blum2011-11-031-4/+10
|
* somebody made a typoJosh Blum2011-11-031-1/+1
|
* usrp: reorganize frontend paths in tree for correction stuffJosh Blum2011-11-031-5/+8
|
* usrp: prefer name iq_balance for api callJosh Blum2011-11-031-4/+4
|
* usrp: register properties for correction and dc offsetJosh Blum2011-11-031-1/+17
|
* usrp: added get_tx/rx_ratesJosh Blum2011-11-031-0/+4
|
* b100: performed streamer API update to b100 implJosh Blum2011-11-031-11/+7
|
* b100: perform test claim on usb before continuingJosh Blum2011-10-241-14/+7
|
* b100: new eeprom map for special 9 byte serialJosh Blum2011-10-121-3/+3
|
* b100: add reference lock sensorJosh Blum2011-10-101-2/+7
|
* B100/USRP1: pass in VID/PID from args string so you can specify where to ↵Nick Foster2011-10-101-2/+10
| | | | look for devices if you like
* Bumping the B100 PID to 0x0002, at Josh's direction.Ben Hilburn2011-10-101-1/+1
|
* usb: added interface args to usb abstractionsJosh Blum2011-09-191-7/+7
|
* B100: don't reset send buffers (screws up TX)Nick Foster2011-08-311-1/+0
|
* B100: fix order-of-operations issue w/SPI & I2CNick Foster2011-08-241-2/+6
|
* B100: reset FPGA GPIF fifos correctly so no garbage data on startupNick Foster2011-08-241-16/+31
|
* uhd: replaced boost filesystem path with fs_path in property treeJosh Blum2011-07-221-4/+4
|
* uhd: added subtree capability to property treeJosh Blum2011-07-081-2/+2
|
* usrp: added clipping to link max rate when setting sample rateJosh Blum2011-07-041-0/+2
|
* usrp: renamed ref_source to clock_source (terminology)Josh Blum2011-07-021-6/+6
|
* usrp: renamed sma source option to externalJosh Blum2011-07-011-2/+2
|
* b100: made async callback safer, other tweaks (still issues)Josh Blum2011-06-301-6/+5
|
* b100: some tweaks (unresolved streaming issues ATM)Josh Blum2011-06-301-13/+8
|
* b100: removed old impl files, moved async processing to io implJosh Blum2011-06-291-2/+2
|
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-17 12:50:18 +0000