Commit message (Collapse) | Author | Age | Files | Lines | |
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* | docs: rdtesting: Remove invalid rate configuration | Martin Braun | 2022-03-14 | 1 | -1/+0 |
| | | | | | Removes an invalid rate configuration for N310 functional FPGA verification tests. | ||||
* | tests: updated devtest runner to use standard device args | Matthew Crymble | 2020-05-27 | 1 | -1/+1 |
| | | | | | This will allow run_testsuite.py to be called for specific devices instead of all devices for a certain type. | ||||
* | uhd: doc: fixed nested comment warning | Lars Amsel | 2020-05-04 | 1 | -2/+1 |
| | | | | Fixed nested comment warning by escaping /* sequence in file path. | ||||
* | tools: R&D testing prodecure updated for E3xx | Sugandha Gupta | 2020-01-10 | 1 | -25/+42 |
| | | | | | | -Adds embedded mode tests for E310 and E320 to the R&D testing procedure. -Modifies increased rates for 1Gige testing on E320 | ||||
* | X310: update UBX/SBX gain settings for phase alignment testing | erickshepherdNI | 2019-12-13 | 1 | -3/+3 |
| | | | | | Update UBX and SBX gain settings in the manual for phase alignment testing. | ||||
* | docs: added N320/N321 to FPGA | mattprost | 2019-11-07 | 1 | -11/+14 |
| | | | | | Added appropriate references to N321 in the R&D testing doc for the FPGA Functional Verification section. | ||||
* | Docs: Adjust FPGA functional verification tests | michael-west | 2019-10-15 | 1 | -21/+21 |
| | | | | | | | - Reduce long tests from 3600 seconds to 600 seconds. - Remove 2xRX@153.6e6 test for N310 10 GbE (not practical). Signed-off-by: michael-west <michael.west@ettus.com> | ||||
* | docs: Document FPGA functional verification test for N320 | Alex Williams | 2019-01-31 | 1 | -0/+101 |
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* | Docs: Adjust E310 functional verification tests | michael-west | 2018-11-26 | 1 | -10/+10 |
| | | | | The sample rates and the interpolation/decimation limits didn't match. | ||||
* | docs: Fix N210 MIMO Phase Alignment command | Brent Stapleton | 2018-10-12 | 1 | -1/+1 |
| | | | | | | | The synchronization source for the N210 MIMO phase alignment needs to be set to anything other than 'pps' or 'auto' (which is actually 'pps'). 'default' skips the call to `set_time_unknown_pps`, which is the proper way to synchronize in this sitation. | ||||
* | e320: Add R&D testing procedure | Sugandha Gupta | 2018-09-24 | 1 | -12/+120 |
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* | docs: Fix Doxygen warnings | Martin Braun | 2018-07-31 | 1 | -3/+3 |
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* | Docs: x300 Functional Verification Procedure | Vidush | 2018-06-15 | 1 | -0/+15 |
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* | Docs: Update FPGA Functional Testing Procedure | Vidush | 2018-06-13 | 1 | -9/+7 |
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* | tools: Add a script for automated testing of FPGAFUNCVERIF | Martin Braun | 2018-06-04 | 1 | -9/+74 |
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* | docs: test procedures: Add FPGAFUNCVERIF-N3x0-v1 | Martin Braun | 2018-06-04 | 1 | -1/+52 |
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* | Docs: Fix E310 Devtest Procedure | Vidush | 2018-06-04 | 1 | -3/+2 |
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* | Docs: Update Testing Procedure | Vidush | 2018-06-04 | 1 | -10/+10 |
| | | | | Fix typos and reflect updated procedure used with v3.12.0.0-rc1. | ||||
* | Docs: Correct E3xx FPGA Functional Verification Test Parameters | michael-west | 2018-05-16 | 1 | -20/+23 |
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* | docs: Describe N300/N310 BIST test procedure | Martin Braun | 2018-05-15 | 1 | -0/+70 |
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* | Docs: Update phase testing commands & instructions. | Vidush | 2018-05-15 | 1 | -24/+5 |
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* | docs: Clarified Instruction for Ubuntu/Python 2 Combo | Vidush | 2018-05-09 | 1 | -2/+3 |
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* | docs:Clarify Testing Procedure | Vidush | 2018-05-09 | 1 | -8/+11 |
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* | Docs: Update procedure for testing phase synchronization | michael-west | 2018-02-04 | 1 | -47/+82 |
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* | Docs: Typo fixes | natetemple | 2018-01-19 | 1 | -3/+3 |
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* | docs: Minor formatting updates to R&D test procedures | Martin Braun | 2017-07-18 | 1 | -60/+65 |
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* | docs: Added FPGA functional verification procedures | Jonathon Pendlum | 2017-03-01 | 1 | -0/+208 |
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* | docs: escape /* to silence doxygen while compiling | Andrej Rode | 2017-02-20 | 1 | -5/+5 |
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* | docs: add description about manual phase alignment testing for RX | Andrej Rode | 2017-01-20 | 1 | -4/+70 |
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* | docs: Added fpga testing with test benches | sugandhagupta | 2017-01-19 | 1 | -0/+66 |
| | | | | docs: Updated fpga testing through simulations | ||||
* | docs: Removed superfluous lines from RD test procs | Martin Braun | 2017-01-17 | 1 | -3/+0 |
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* | docs: Added devtest test procedure | Martin Braun | 2017-01-17 | 1 | -0/+87 |
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* | docs: Added R&D testing procedures | Martin Braun | 2016-10-27 | 1 | -0/+95 |