uhd - Ettus' UHD Repository

	Commit message (Collapse)	Author	Age	Files	Lines
*	Add gitignore file.	Philip Balister	2010-06-15	1	-0/+19
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*	Rename loopback of random length packets test program so we know it needs	Philip Balister	2010-06-13	2	-2/+2
\| \| \| \|	loopback fpga image. Needs debug.
*	Exit on errors. Run until an error occurs. Alloq for up to 2 sequence	Philip Balister	2010-06-13	1	-6/+17
\| \| \| \|	number errors so program can start with "dirty" fpga contents.
*	Update usrp_e.h file. Change programs to use struct element status instead ↵	Philip Balister	2010-06-13	6	-20/+29
\| \| \| \|	of flags.
*	reverted usrp-e-led sorry	Josh Blum	2010-05-28	1	-8/+8
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*	Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdpriv into usrp_e	Josh Blum	2010-05-27	1	-8/+8
\| \| \| \| \|	Conflicts: host/utils/CMakeLists.txt
*	Divide by 4 to convert byts/sec to samples/sec. Multiply by 4 is right out.	Philip Balister	2010-05-23	1	-1/+1
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*	Work on crc testing program. Currently dumps first received packet to the	Philip Balister	2010-05-21	1	-10/+36
\| \| \| \|	screen. Started to reduce teh number of warnings.
*	OK, now crc uses the timed interface to set the data rate.	Philip Balister	2010-05-21	1	-21/+21
\| \| \| \| \| \| \| \| \| \|	Revert "Revert "Revert "Update test program to reflect what is in the FPGA image.""" This reverts commit b5dfe74e991d240f0e666dfd521726ec61128eb8. Conflicts: host/apps/omap_debug/usrp-e-crc-rw.c
*	Rename loopback test program to match bin file name.	Philip Balister	2010-05-20	2	-3/+3
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*	Enable realtime scheduling in loopback test to prevent overruns.	Philip Balister	2010-05-20	1	-0/+5
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*	Display data rate in samples/second and fix typo.	Philip Balister	2010-05-19	1	-5/+5
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*	Calculate received sample rate for loopback test.	Philip Balister	2010-05-19	1	-3/+24
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*	Use better optimization settings.	Philip Balister	2010-05-19	1	-5/+6
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*	Fix initialization bug.	Philip Balister	2010-05-19	1	-0/+6
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*	Rename test program to match FPGA bin file name and add data rate calculation.	Philip Balister	2010-05-19	2	-19/+39
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*	Keep repo in sync with my churn ...	Philip Balister	2010-05-19	2	-7/+12
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*	Comment out progress indicators.	Philip Balister	2010-05-18	1	-4/+8
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*	Revert "Revert "Update test program to reflect what is in the FPGA image.""	Philip Balister	2010-05-18	1	-21/+20
\| \| \| \| \| \|	This reverts commit 7d0a98fc33c17457c9f4cd8e03eddb0d559457f0. Must make filenames more different.
*	Remove rand for now. Fix bug in data rate calculation.	Philip Balister	2010-05-18	1	-2/+4
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*	Revert "Update test program to reflect what is in the FPGA image."	Philip Balister	2010-05-18	1	-20/+21
\| \| \| \| \| \|	This reverts commit 4d82cabe938b398bc42cab3d316983d2bbe40d06. Now sure where I got the idea this image did not contain the rate setting code.
*	Update test program to reflect what is in the FPGA image.	Philip Balister	2010-05-14	1	-21/+20
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*	got clock gen config working and tested	Josh Blum	2010-05-13	1	-4/+6
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*	Connect enable to the correct gpio.	Philip Balister	2010-05-13	1	-1/+1
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*	Change to 24 bit transfers.	Philip Balister	2010-05-13	1	-2/+2
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*	Print a . for every packet received.	Philip Balister	2010-05-13	2	-0/+5
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*	Add calculation for data trasnfer rates.	Philip Balister	2010-05-12	1	-3/+43
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*	Add program to do initial configuration of the clkgen chip.	Philip Balister	2010-05-10	2	-1/+298
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*	Update usrp_e.h file from kernel header.	Philip Balister	2010-05-07	1	-5/+0
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*	First pass at data transfer program that uses CRC.	Philip Balister	2010-05-07	2	-1/+200
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*	Print an error and exit if open fails for some programs.	Philip Balister	2010-05-07	3	-0/+17
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*	Remove workaround for driver hang.	root	2010-05-05	3	-6/+2
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*	Spi data returned in struct now.	Philip Balister	2010-05-03	1	-1/+1
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*	Update path to put module in.	Philip Balister	2010-05-03	1	-1/+1
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*	Add hack to work around driver race.	Philip Balister	2010-05-03	2	-0/+4
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*	Add a hack to work around a driver race. Remove when teh driver is fixed.	Philip Balister	2010-05-03	1	-0/+2
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*	Change overrun indication. New progress indicator. Turn on RT scheduler for	Philip Balister	2010-05-02	1	-2/+24
\| \| \| \|	user space.
*	Update IP address for my home desktop. Change module version to 2.6.33.	Philip Balister	2010-05-02	2	-3/+3
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*	Add script to setup board id info in eeprom.	Philip Balister	2010-04-29	1	-0/+17
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*	Various updates to test programs.	Philip Balister	2010-04-28	4	-8/+93
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*	Add program to exercise interface using internal fpga data source and data sink.	Philip Balister	2010-04-27	2	-1/+172
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*	Send only required number of bytes. Do it for longer.	Philip Balister	2010-04-27	1	-2/+2
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*	Updates to test programs.	Philip Balister	2010-04-23	3	-14/+181
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*	Update transfer test program to use usrp_transfer_frame struct.	Philip Balister	2010-04-22	2	-17/+60
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*	Add program to setup debug pins.	Philip Balister	2010-04-20	3	-1/+83
\| \| \| \|	Add script to reload fpga and module.
*	Initialize data array to help show when reads fail. Report return value	Philip Balister	2010-04-20	1	-0/+5
\| \| \| \|	from ioctl
*	usrp-e-spi: change active edges around.	Philip Balister	2010-04-20	1	-1/+1
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*	usrp-e-i2c always uses hex arguments.	Philip Balister	2010-04-20	1	-6/+10
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*	Always put new bin file in /home/root.	Philip Balister	2010-04-20	1	-2/+2
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*	Fix silly typo in script.	Josh Blum	2010-04-20	1	-0/+1
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