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* reverted usrp-e-led sorryJosh Blum2010-05-281-8/+8
* Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdpriv into usrp_eJosh Blum2010-05-271-8/+8
* Divide by 4 to convert byts/sec to samples/sec. Multiply by 4 is right out.Philip Balister2010-05-231-1/+1
* Work on crc testing program. Currently dumps first received packet to thePhilip Balister2010-05-211-10/+36
* OK, now crc uses the timed interface to set the data rate.Philip Balister2010-05-211-21/+21
* Rename loopback test program to match bin file name.Philip Balister2010-05-202-3/+3
* Enable realtime scheduling in loopback test to prevent overruns.Philip Balister2010-05-201-0/+5
* Display data rate in samples/second and fix typo.Philip Balister2010-05-191-5/+5
* Calculate received sample rate for loopback test.Philip Balister2010-05-191-3/+24
* Use better optimization settings.Philip Balister2010-05-191-5/+6
* Fix initialization bug.Philip Balister2010-05-191-0/+6
* Rename test program to match FPGA bin file name and add data rate calculation.Philip Balister2010-05-192-19/+39
* Keep repo in sync with my churn ...Philip Balister2010-05-192-7/+12
* Comment out progress indicators.Philip Balister2010-05-181-4/+8
* Revert "Revert "Update test program to reflect what is in the FPGA image.""Philip Balister2010-05-181-21/+20
* Remove rand for now. Fix bug in data rate calculation.Philip Balister2010-05-181-2/+4
* Revert "Update test program to reflect what is in the FPGA image."Philip Balister2010-05-181-20/+21
* Update test program to reflect what is in the FPGA image.Philip Balister2010-05-141-21/+20
* got clock gen config working and testedJosh Blum2010-05-131-4/+6
* Connect enable to the correct gpio.Philip Balister2010-05-131-1/+1
* Change to 24 bit transfers.Philip Balister2010-05-131-2/+2
* Print a . for every packet received.Philip Balister2010-05-132-0/+5
* Add calculation for data trasnfer rates.Philip Balister2010-05-121-3/+43
* Add program to do initial configuration of the clkgen chip.Philip Balister2010-05-102-1/+298
* Update usrp_e.h file from kernel header.Philip Balister2010-05-071-5/+0
* First pass at data transfer program that uses CRC.Philip Balister2010-05-072-1/+200
* Print an error and exit if open fails for some programs.Philip Balister2010-05-073-0/+17
* Remove workaround for driver hang.root2010-05-053-6/+2
* Spi data returned in struct now.Philip Balister2010-05-031-1/+1
* Update path to put module in.Philip Balister2010-05-031-1/+1
* Add hack to work around driver race.Philip Balister2010-05-032-0/+4
* Add a hack to work around a driver race. Remove when teh driver is fixed.Philip Balister2010-05-031-0/+2
* Change overrun indication. New progress indicator. Turn on RT scheduler forPhilip Balister2010-05-021-2/+24
* Update IP address for my home desktop. Change module version to 2.6.33.Philip Balister2010-05-022-3/+3
* Add script to setup board id info in eeprom.Philip Balister2010-04-291-0/+17
* Various updates to test programs.Philip Balister2010-04-284-8/+93
* Add program to exercise interface using internal fpga data source and data sink.Philip Balister2010-04-272-1/+172
* Send only required number of bytes. Do it for longer.Philip Balister2010-04-271-2/+2
* Updates to test programs.Philip Balister2010-04-233-14/+181
* Update transfer test program to use usrp_transfer_frame struct.Philip Balister2010-04-222-17/+60
* Add program to setup debug pins.Philip Balister2010-04-203-1/+83
* Initialize data array to help show when reads fail. Report return valuePhilip Balister2010-04-201-0/+5
* usrp-e-spi: change active edges around.Philip Balister2010-04-201-1/+1
* usrp-e-i2c always uses hex arguments.Philip Balister2010-04-201-6/+10
* Always put new bin file in /home/root.Philip Balister2010-04-201-2/+2
* Fix silly typo in script.Josh Blum2010-04-201-0/+1
* Fix script to write board id eeprom.Josh Blum2010-04-201-2/+2
* Add scripts to read and write board id info into usrp e id eepromPhilip Balister2010-04-202-0/+20
* pulled in master and got usrp-e code compilingJosh Blum2010-04-162-2/+2
* Fix typo.Philip Balister2010-04-131-0/+1
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