| Commit message (Expand) | Author | Age | Files | Lines |
... | |
* | fpga: x400: Add axi_inter_4x64_512_bd IP | Wade Fife | 2022-02-07 | 3 | -0/+604 |
* | fpga: x400: Add axi_inter_2x128_512_bd IP | Wade Fife | 2022-02-07 | 3 | -0/+449 |
* | images: Update N32x CPLD manifest | Humberto Jimenez | 2022-01-31 | 1 | -1/+1 |
* | fpga: docs: Add B205mini FPGA info | Wade Fife | 2022-01-28 | 1 | -9/+11 |
* | fpga: n3xx: rh: cpld: Refactor CPLD build process | Humberto Jimenez | 2022-01-25 | 6 | -24/+119 |
* | fpga: Remove noc_shell_regs.vh and sim_rfnoc_lib.svh | Martin Braun | 2022-01-25 | 6 | -1058/+1 |
* | fpga: x400: cpld: Bump copyright | Javier Valenzuela | 2022-01-25 | 9 | -9/+9 |
* | fpga: x400: Bump copyright | Javier Valenzuela | 2022-01-25 | 14 | -14/+14 |
* | fpga: x400: Expand PS GPIO port for DIO control | Javier Valenzuela | 2022-01-25 | 7 | -19/+58 |
* | fpga: x400: Add SPI bus support for GPIO ports | Javier Valenzuela | 2022-01-25 | 9 | -60/+1338 |
* | fpga: x400: Add GPIO control via ATR and DB state | Javier Valenzuela | 2022-01-25 | 14 | -199/+2932 |
* | fpga: x400: Connect Radio Blocks to DIO | Javier Valenzuela | 2022-01-25 | 11 | -232/+627 |
* | fpga: tools: Fix adding directories for HDL source | Wade Fife | 2022-01-13 | 1 | -1/+1 |
* | fpga: hls: Add version to generated HLS IP | Wade Fife | 2022-01-13 | 1 | -2/+2 |
* | fpga: x400: Fix rfnoc_image_core.vh path | Wade Fife | 2022-01-12 | 1 | -1/+1 |
* | uhd: update git://github.com references to https | Steven Koo | 2022-01-11 | 3 | -13/+13 |
* | fpga: e320: Connect CTRL_IN pins to FPGA | Martin Braun | 2022-01-10 | 2 | -1/+12 |
* | fpga: e320: Remove copy/paste from N310 code | Martin Braun | 2022-01-10 | 1 | -9/+0 |
* | images: Add the utilization report for X410 images (X4_200) | Martin Braun | 2021-12-17 | 1 | -1/+3 |
* | fpga: x300: Fix time register readback | Wade Fife | 2021-12-15 | 1 | -2/+2 |
* | fpga: usrp2: update build tools to use python3 | Matthew Crymble | 2021-12-08 | 2 | -6/+6 |
* | fpga: tools: Update Vivado scripts to use python3 | Wade Fife | 2021-12-08 | 1 | -4/+4 |
* | rfnoc: Fix noc_shell direction comments | Wade Fife | 2021-12-08 | 18 | -81/+86 |
* | fpga: x300: OR ATR signals going into db_control | Martin Braun | 2021-12-07 | 1 | -1/+10 |
* | fpga: x400: cpld: Add manufacturing support | Humberto Jimenez | 2021-12-01 | 4 | -7/+27 |
* | fpga: x400: Refactor CPLDs build process | Humberto Jimenez | 2021-12-01 | 34 | -258/+741 |
* | fpga: tools: Add Quartus build utilities | Humberto Jimenez | 2021-12-01 | 3 | -0/+163 |
* | fpga: Add ability to get time from Radio block | michael-west | 2021-11-17 | 3 | -2/+26 |
* | fpga: rfnoc: Add RFNoC CHDR resize module | Wade Fife | 2021-11-04 | 7 | -0/+2031 |
* | fpga: rfnoc: Add CHDR management util functions | Wade Fife | 2021-11-04 | 1 | -4/+85 |
* | x410: correct 100GbE link speed | Andrew Lynch | 2021-11-02 | 2 | -2/+2 |
* | fpga: lib: Clean up axi_mux | Wade Fife | 2021-10-28 | 1 | -91/+160 |
* | fpga: rfnoc: Add labels to axi_switch generate blocks | Wade Fife | 2021-10-28 | 1 | -36/+67 |
* | fpga: rfnoc: Add labels to chdr_mgmt_pkt_handler | Wade Fife | 2021-10-28 | 1 | -30/+45 |
* | fpga: rfnoc: Add documentation to chdr_xb_routing_table | Wade Fife | 2021-10-28 | 1 | -46/+84 |
* | fpga: Shorten line length for Launchpad linter | Aaron Rossetto | 2021-10-28 | 1 | -2/+4 |
* | siggen: Fix direction of rotation | Wade Fife | 2021-10-27 | 4 | -35/+44 |
* | fpga: x300: Update synchronizer constraint | Wade Fife | 2021-09-13 | 1 | -1/+1 |
* | fpga: n3xx: Update synchronizer constraint | Wade Fife | 2021-09-13 | 1 | -3/+2 |
* | fpga: lib: Update example constraint in synchronizer | Wade Fife | 2021-09-13 | 1 | -18/+40 |
* | fpga: Update help message for setupenv.sh | Wade Fife | 2021-09-10 | 1 | -5/+7 |
* | fpga: Remove stale references to UHD_FPGA_DIR | Wade Fife | 2021-09-08 | 8 | -16/+8 |
* | fpga: tools: Add UHD_FPGA_DIR definition to synthesis | Wade Fife | 2021-09-08 | 3 | -6/+11 |
* | fpga: Set default part for sim in setupenv.sh | Wade Fife | 2021-08-30 | 6 | -5/+24 |
* | x300: Fix sfpp_io_core tuser width | Wade Fife | 2021-08-27 | 1 | -1/+1 |
* | fpga: Fix Xilinx bitfile parser for Python 3 | Martin Braun | 2021-08-24 | 1 | -31/+54 |
* | sim: Update chdr_16sc_to_sc12 testbench | michael-west | 2021-08-10 | 1 | -137/+159 |
* | fpga: Re-order error and data packets | michael-west | 2021-08-10 | 1 | -2/+28 |
* | fpga: Fix sc16 to sc12 converter | michael-west | 2021-08-10 | 1 | -62/+80 |
* | fpga: rfnoc: Fix EOB loss in DUC | Wade Fife | 2021-08-08 | 7 | -218/+1858 |