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* fpga: e31x: Update constraints to avoid timing issuesWade Fife2020-04-081-6/+6
* fpga: tools: Add support for .sdc in VivadoPaul Butler2020-04-021-0/+3
* fpga: rfnoc: Add gate to dynamically enable control-port interfacesMax Köhler2020-04-011-0/+91
* fpga: rfnoc: ctrport_combiner with deterministic latency for PRIORITY=1Max Köhler2020-04-011-13/+51
* fpga: tools: Add default Vivado install locationWade Fife2020-04-011-1/+5
* fpga: tools: Add ModelSim to run_testbenches.pyWade Fife2020-03-231-11/+11
* fixup! fpga: tools: Add modelsim to make sim targetsWade Fife2020-03-231-27/+25
* fpga: Fix errors found by linting with vsimAndrew Moch2020-03-236-19/+22
* fpga: tools: Add modelsim to make sim targetsAndrew Moch2020-03-204-35/+127
* fpga: tools: Ignore BD layout info for TCL-based BDHumberto Jimenez2020-03-121-1/+1
* sim: Rename class typedefsWade Fife2020-03-094-72/+72
* sim: Add ChdrIfaceBfm testWade Fife2020-03-095-5/+675
* sim: Add item support to RFNoC simulationWade Fife2020-03-098-40/+420
* sim: Parameterize chdr_word_t data typeWade Fife2020-03-0916-216/+411
* sim: Split PkgRfnocBlockCtrlBfm into separate packagesWade Fife2020-03-095-400/+418
* fpga: lib: Modify for loop to Verilog 2001 syntaxMax Köhler2020-03-091-34/+35
* rfnoc: Fix FIR and AXI RAM block register documentationWade Fife2020-03-052-9/+11
* rfnoc: Add management filter to generic xportWade Fife2020-02-194-101/+172
* radio: Update TB to use new block ctrl connectWade Fife2020-02-191-41/+17
* x300: add front-panel GPIO source controleklai2020-02-182-7/+45
* rfnoc: Update blocks to use autogenerated noc_shellWade Fife2020-02-0623-1825/+2407
* fixup! lib: add option for output register in pps generatorHumberto Jimenez2020-02-051-1/+1
* lib: add option for output register in pps generatorMax Köhler2020-01-281-2/+23
* Merge FPGA repository back into UHD repositoryMartin Braun2020-01-283090-0/+2912909
* Removed copy of FPGA source files.Martin Braun2014-10-073343-3119114/+0
* Merge branch 'maint'Martin Braun2014-09-24275-292796/+13460
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| * fpga: Multiple X300 FPGA bugfixes and enhancementsAshish Chaudhari2014-09-24275-292796/+13460
* | fpga: Added FPGA code for B200 AD9361 host driver additionAshish Chaudhari2014-08-202-8/+19
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* fpga: Added FPGA code for X300 MIMO alignment bugfixAshish Chaudhari2014-08-195-50/+22
* fpga: Updating FPGA code for UHD-3.7.2-rc1Ben Hilburn2014-07-2258-3128/+3153
* fpga: updating b200 and x300 FPGA source code for latest imagesBen Hilburn2014-05-1471-4093/+117072
* x300 fpga: updating FPGA code with latest bug fixesBen Hilburn2014-03-206-3411/+3432
* Merge branch 'maint'Nicholas Corgan2014-03-1743-112988/+0
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| * fpga: removed superfluous B2x0 filesNicholas Corgan2014-02-2043-112988/+0
* | Adding bootram.coe file from latest firmware changes.michael-west2014-03-031-2377/+2377
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* Pushing the bulk of UHD-3.7.0 code.Ben Hilburn2014-02-142194-1083/+1489296
* b2xx: Updating FPGA source with recent bugfixes.Ben Hilburn2013-12-03103-626/+2019
* Squashed B200 FPGA Source. Code from Josh Blum, Ian Buckley, and Matt Ettus.Ben Hilburn2013-10-10591-0/+292056
* Merge branch 'fpga_master' into master_converter_workJosh Blum2013-08-285-13/+13
* Merge branch 'fpga_master' into maintJosh Blum2013-05-092-4/+8
* Merge branch 'fpga_master' into maintJosh Blum2013-04-021-0/+1
* Merge branch 'fpga_master' into maintJosh Blum2013-03-259-43/+58
* Merge branch 'fpga_master'Josh Blum2012-10-103-9/+28
* Merge branch 'fpga_master'Josh Blum2012-10-053-6/+15
* Merge branch 'b100_2rx_fpga' into b100_2rxJosh Blum2012-09-044-1/+134
* Merge branch 'fpga_next' into nextJosh Blum2012-07-194-4/+4
* Merge branch 'fpga_next' into nextJosh Blum2012-07-191-1/+8
* Merge branch 'fpga_next' into nextJosh Blum2012-07-1713-724/+219
* Merge branch 'master' into nextJosh Blum2012-07-163-43/+6
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| * Merge branch 'fpga_master'Josh Blum2012-07-163-43/+6
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