| Commit message (Expand) | Author | Age | Files | Lines |
... | |
* | fpga: tools: Fix HLS IP build with Cygwin | Humberto Jimenez | 2020-05-12 | 2 | -4/+10 |
* | fpga: rfnoc: Clean up ctrlport_splitter usage | Wade Fife | 2020-05-12 | 2 | -2/+2 |
* | fpga: utils: Optimize ctrlport_splitter for NUM_SLAVES = 1 | Wade Fife | 2020-05-12 | 1 | -45/+61 |
* | TwinRX: Remove decimation from frontend | Michael West | 2020-05-12 | 1 | -36/+52 |
* | DUC/DDC: Add variable time increment | Michael West | 2020-05-12 | 5 | -19/+39 |
* | X300: Make VITA time monotonic | Michael West | 2020-05-12 | 1 | -2/+2 |
* | fpga: Change default MTU to 10 | Wade Fife | 2020-05-11 | 5 | -5/+5 |
* | fpga: sim: Don't affect packet arguments in chdr_to_axis | Wade Fife | 2020-05-04 | 1 | -4/+4 |
* | fpga: sim: Fix get_slave_data_bfm method | Wade Fife | 2020-05-04 | 1 | -1/+1 |
* | fpga: sim: Export return types in PkgRfnocBlockCtrlBfm | Wade Fife | 2020-05-04 | 1 | -0/+2 |
* | fpga: docs: Remove RFNoC targets from manual | Martin Braun | 2020-04-30 | 1 | -28/+13 |
* | rfnoc: Add RFNoC fosphor block | Wade Fife | 2020-04-14 | 7 | -1/+1585 |
* | fpga: rfnoc: Add option to sample sideband info at start of packet | Wade Fife | 2020-04-14 | 1 | -58/+117 |
* | fpga: tools: Add -voptargs=+acc to ModelSim GUI | Wade Fife | 2020-04-14 | 1 | -1/+1 |
* | fpga: core: Add chdr_update_length function | Wade Fife | 2020-04-14 | 1 | -0/+21 |
* | fpga: lib: Add AXI-Stream splitter (axis_split) | Wade Fife | 2020-04-14 | 2 | -0/+129 |
* | fpga: sim: Export ChdrPacket in PkgRfnoBlockCtrlBfm | Wade Fife | 2020-04-14 | 1 | -0/+1 |
* | fpga: tools: Option to check for full Vivado version | Humberto Jimenez | 2020-04-14 | 1 | -0/+24 |
* | fpga: e31x: Update constraints to avoid timing issues | Wade Fife | 2020-04-08 | 1 | -6/+6 |
* | fpga: tools: Add support for .sdc in Vivado | Paul Butler | 2020-04-02 | 1 | -0/+3 |
* | fpga: rfnoc: Add gate to dynamically enable control-port interfaces | Max Köhler | 2020-04-01 | 1 | -0/+91 |
* | fpga: rfnoc: ctrport_combiner with deterministic latency for PRIORITY=1 | Max Köhler | 2020-04-01 | 1 | -13/+51 |
* | fpga: tools: Add default Vivado install location | Wade Fife | 2020-04-01 | 1 | -1/+5 |
* | fpga: tools: Add ModelSim to run_testbenches.py | Wade Fife | 2020-03-23 | 1 | -11/+11 |
* | fixup! fpga: tools: Add modelsim to make sim targets | Wade Fife | 2020-03-23 | 1 | -27/+25 |
* | fpga: Fix errors found by linting with vsim | Andrew Moch | 2020-03-23 | 6 | -19/+22 |
* | fpga: tools: Add modelsim to make sim targets | Andrew Moch | 2020-03-20 | 4 | -35/+127 |
* | fpga: tools: Ignore BD layout info for TCL-based BD | Humberto Jimenez | 2020-03-12 | 1 | -1/+1 |
* | sim: Rename class typedefs | Wade Fife | 2020-03-09 | 4 | -72/+72 |
* | sim: Add ChdrIfaceBfm test | Wade Fife | 2020-03-09 | 5 | -5/+675 |
* | sim: Add item support to RFNoC simulation | Wade Fife | 2020-03-09 | 8 | -40/+420 |
* | sim: Parameterize chdr_word_t data type | Wade Fife | 2020-03-09 | 16 | -216/+411 |
* | sim: Split PkgRfnocBlockCtrlBfm into separate packages | Wade Fife | 2020-03-09 | 5 | -400/+418 |
* | fpga: lib: Modify for loop to Verilog 2001 syntax | Max Köhler | 2020-03-09 | 1 | -34/+35 |
* | rfnoc: Fix FIR and AXI RAM block register documentation | Wade Fife | 2020-03-05 | 2 | -9/+11 |
* | rfnoc: Add management filter to generic xport | Wade Fife | 2020-02-19 | 4 | -101/+172 |
* | radio: Update TB to use new block ctrl connect | Wade Fife | 2020-02-19 | 1 | -41/+17 |
* | x300: add front-panel GPIO source control | eklai | 2020-02-18 | 2 | -7/+45 |
* | rfnoc: Update blocks to use autogenerated noc_shell | Wade Fife | 2020-02-06 | 23 | -1825/+2407 |
* | fixup! lib: add option for output register in pps generator | Humberto Jimenez | 2020-02-05 | 1 | -1/+1 |
* | lib: add option for output register in pps generator | Max Köhler | 2020-01-28 | 1 | -2/+23 |
* | Merge FPGA repository back into UHD repository | Martin Braun | 2020-01-28 | 3090 | -0/+2912909 |
* | Removed copy of FPGA source files. | Martin Braun | 2014-10-07 | 3343 | -3119114/+0 |
* | Merge branch 'maint' | Martin Braun | 2014-09-24 | 275 | -292796/+13460 |
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| * | fpga: Multiple X300 FPGA bugfixes and enhancements | Ashish Chaudhari | 2014-09-24 | 275 | -292796/+13460 |
* | | fpga: Added FPGA code for B200 AD9361 host driver addition | Ashish Chaudhari | 2014-08-20 | 2 | -8/+19 |
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* | fpga: Added FPGA code for X300 MIMO alignment bugfix | Ashish Chaudhari | 2014-08-19 | 5 | -50/+22 |
* | fpga: Updating FPGA code for UHD-3.7.2-rc1 | Ben Hilburn | 2014-07-22 | 58 | -3128/+3153 |
* | fpga: updating b200 and x300 FPGA source code for latest images | Ben Hilburn | 2014-05-14 | 71 | -4093/+117072 |
* | x300 fpga: updating FPGA code with latest bug fixes | Ben Hilburn | 2014-03-20 | 6 | -3411/+3432 |