| Commit message (Expand) | Author | Age | Files | Lines |
* | fpga: x400: Fix x4xx_qsfp_wrapper testbench | Wade Fife | 2021-06-22 | 1 | -0/+3 |
* | x400: sim: Move testbenches to sim folder | Wade Fife | 2021-06-17 | 13 | -0/+0 |
* | fpga: Update testbenches to work in ModelSim | Wade Fife | 2021-06-17 | 8 | -89/+232 |
* | fpga: x400: Add makefiles for RF testbenches | Wade Fife | 2021-06-17 | 6 | -0/+209 |
* | fpga: x400: zbx: Add support for ZBX CPLD | Javier Valenzuela | 2021-06-10 | 37 | -0/+17727 |
* | fpga: x400: cpld: Add support for X410 motherboard CPLD | Max Köhler | 2021-06-10 | 42 | -0/+8377 |
* | fpga: x400: Add support for X410 motherboard FPGA | Wade Fife | 2021-06-10 | 204 | -0/+299632 |
* | fpga: Update rfnoc_image_core for all targets | Wade Fife | 2021-06-10 | 18 | -5780/+6492 |
* | fpga: Change RFNoC YAML version numbers to strings | Wade Fife | 2021-06-08 | 10 | -20/+20 |
* | fpga: e320: Improve timing on LVDS interface | Wade Fife | 2020-12-11 | 1 | -3/+2 |
* | fpga: e31x: Add OOT sources to Makefile.e31x.inc | Wade Fife | 2020-11-13 | 1 | -0/+8 |
* | fpga: e31x: Change image file to e310_rfnoc_image_core | Wade Fife | 2020-09-09 | 3 | -5/+5 |
* | E320: Revert addition of Replay block | michael-west | 2020-09-04 | 3 | -266/+270 |
* | fpga: Add Replay Block to RFNoC Core Image | mattprost | 2020-09-03 | 20 | -591/+2586 |
* | fpga: Update DRAM IO signatures | Wade Fife | 2020-09-03 | 4 | -28/+28 |
* | fpga: n3xx: Update AXI interconnect address range | Wade Fife | 2020-08-28 | 4 | -2928/+2217 |
* | fpga: e320: Update AXI interconnect address range | Wade Fife | 2020-08-28 | 2 | -2195/+1373 |
* | fpga: e31x: Change RFNoC Ctrl clock to 40 MHz | Wade Fife | 2020-08-19 | 2 | -1/+3 |
* | fpga: e320: Fix timeout for timekeeper registers | Wade Fife | 2020-08-19 | 1 | -191/+284 |
* | fpga: n3xx: Fix timeout for timekeeper registers | Wade Fife | 2020-08-19 | 3 | -195/+307 |
* | fpga: e31x: Fix timeout for timekeeper registers | Wade Fife | 2020-08-19 | 1 | -180/+278 |
* | fpga: e320: Fix default YAML target to E320_1G | Martin Braun | 2020-08-17 | 1 | -1/+1 |
* | fpga: e310: Fix device in image core YAML | Wade Fife | 2020-08-14 | 1 | -1/+1 |
* | n320: Double radio ingress buffer size | mattprost | 2020-08-12 | 2 | -8/+8 |
* | fpga: n320: Add BIST (AA) image files | steviez | 2020-07-31 | 5 | -0/+1148 |
* | fpga, mpm: Bump FPGA compat number | RobertWalstab | 2020-07-24 | 3 | -3/+3 |
* | fpga: remove liberio | RobertWalstab | 2020-07-20 | 1 | -1/+1 |
* | fpga: rfnoc: Fix testbenches to run under ModelSim | Wade Fife | 2020-07-20 | 1 | -3/+4 |
* | fpga: e31x: Add gitignore file | Martin Braun | 2020-07-18 | 1 | -0/+8 |
* | e31x: Minor cleanup on top-level e31x.v module | Martin Braun | 2020-07-18 | 2 | -15/+14 |
* | e31x: Swap out liberio for internal ethernet in the idle image | RobertWalstab | 2020-07-18 | 1 | -2/+2 |
* | e31x: fpga: connect device_id | RobertWalstab | 2020-07-18 | 1 | -1/+5 |
* | n32x: Swap out liberio for internal Ethernet | RobertWalstab | 2020-07-16 | 1 | -30/+138 |
* | n3xx: Swap out liberio for internal Ethernet | RobertWalstab | 2020-07-16 | 4 | -1115/+1262 |
* | e31x: Swap out liberio for internal Ethernet | RobertWalstab | 2020-07-16 | 5 | -429/+522 |
* | e320: Swap out liberio for internal Ethernet | Alex Williams | 2020-07-16 | 4 | -520/+532 |
* | fpga: n3xx: Fix White Rabbit images | Wade Fife | 2020-07-01 | 1 | -3/+19 |
* | fpga: Update RFNOC_EDGE_TBL_FILE for Cygwin | Wade Fife | 2020-06-12 | 4 | -4/+4 |
* | x300: Expand DRAM address space to 1G | Wade Fife | 2020-05-18 | 1 | -3/+3 |
* | fpga: e31x: Replace symbolic link for Cygwin | Wade Fife | 2020-05-12 | 1 | -1/+1 |
* | X300: Make VITA time monotonic | Michael West | 2020-05-12 | 1 | -2/+2 |
* | fpga: e31x: Update constraints to avoid timing issues | Wade Fife | 2020-04-08 | 1 | -6/+6 |
* | rfnoc: Add management filter to generic xport | Wade Fife | 2020-02-19 | 1 | -30/+34 |
* | x300: add front-panel GPIO source control | eklai | 2020-02-18 | 2 | -7/+45 |
* | Merge FPGA repository back into UHD repository | Martin Braun | 2020-01-28 | 1088 | -0/+685426 |
* | Removed copy of FPGA source files. | Martin Braun | 2014-10-07 | 2073 | -1320378/+0 |
* | Merge branch 'maint' | Martin Braun | 2014-09-24 | 269 | -292575/+13138 |
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| * | fpga: Multiple X300 FPGA bugfixes and enhancements | Ashish Chaudhari | 2014-09-24 | 269 | -292575/+13138 |
* | | fpga: Added FPGA code for B200 AD9361 host driver addition | Ashish Chaudhari | 2014-08-20 | 2 | -8/+19 |
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* | fpga: Added FPGA code for X300 MIMO alignment bugfix | Ashish Chaudhari | 2014-08-19 | 5 | -50/+22 |