| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | fpga: tools: Put SIM_SRCS at end of compile order | Wade Fife | 2021-06-17 | 1 | -1/+1 |
| | | | | | | | VHDL depends on the compile order. This commit changes the order so that SIM_SRCS are compiled last with ModelSim to avoid issues with dependencies. | ||||
| * | fpga: tools: Add modelsim.ini to ModelSim calls | Wade Fife | 2021-06-17 | 1 | -3/+10 |
| | | | | | | | | | | | | This adds the MSIM_VIV_COMPLIBDIR environment variable to specify a non-default location for the compilation libraries. This also allows a modelsim.ini other than the one in the ModelSim installation folder to be used. By default, the one in the simulation libraries compilation directory will be used. This can be changed by setting MSIM_MODELSIM_INI to the one you want to use, or set it to an empty string to use the one in the ModelSim installation folder. | ||||
| * | fpga: tools: Highlight suppressible errors from vlint | Wade Fife | 2020-06-29 | 1 | -1/+1 |
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| * | fpga: tools: Fix ModelSim return status | Wade Fife | 2020-06-18 | 1 | -3/+6 |
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| * | fpga: tools: Improve native ModelSim support | Wade Fife | 2020-05-26 | 1 | -0/+148 |
| This adds support for colored output and support for directories added to the list of source files (for HLS support). | |||||
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| Ettus' UHD Repository |
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