Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | fpga: Remove Python2 support from build system | Martin Braun | 2021-01-04 | 3 | -7/+7 |
* | fpga: tools: RESOLVE_PATH checks for an empty path | Andrew Moch | 2020-07-30 | 1 | -4/+4 |
* | fpga: tools: remove temporary Xilinx directories for BD recreation | Max Köhler | 2020-06-15 | 1 | -10/+13 |
* | fpga: tools: Allow multiple top modules with ModelSim | Wade Fife | 2020-06-11 | 1 | -1/+1 |
* | fpga: tools: Improve native ModelSim support | Wade Fife | 2020-05-26 | 1 | -72/+38 |
* | fpga: tools: Add contents of directories for HDL source | Wade Fife | 2020-05-26 | 1 | -1/+1 |
* | fpga: tools: Fix HLS IP build with Cygwin | Humberto Jimenez | 2020-05-12 | 1 | -3/+4 |
* | fpga: tools: Add -voptargs=+acc to ModelSim GUI | Wade Fife | 2020-04-14 | 1 | -1/+1 |
* | fixup! fpga: tools: Add modelsim to make sim targets | Wade Fife | 2020-03-23 | 1 | -27/+25 |
* | fpga: tools: Add modelsim to make sim targets | Andrew Moch | 2020-03-20 | 2 | -19/+106 |
* | Merge FPGA repository back into UHD repository | Martin Braun | 2020-01-28 | 6 | -0/+418 |