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* sim: Rename class typedefsWade Fife2020-03-094-72/+72
* sim: Add ChdrIfaceBfm testWade Fife2020-03-095-5/+675
* sim: Add item support to RFNoC simulationWade Fife2020-03-092-34/+414
* sim: Parameterize chdr_word_t data typeWade Fife2020-03-098-208/+381
* sim: Split PkgRfnocBlockCtrlBfm into separate packagesWade Fife2020-03-095-400/+418
* Merge FPGA repository back into UHD repositoryMartin Braun2020-01-2822-0/+6222
* Removed copy of FPGA source files.Martin Braun2014-10-0727-2901/+0
* Pushing the bulk of UHD-3.7.0 code.Ben Hilburn2014-02-1427-0/+2901