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* fpga: sim: Fix stream command and status modelsWade Fife2020-08-311-9/+9
* fpga: rfnoc: Add support for 512-bit CHDR widthsAndrew Moch2020-06-181-152/+192
* fpga: sim: Don't affect packet arguments in chdr_to_axisWade Fife2020-05-041-4/+4
* sim: Rename class typedefsWade Fife2020-03-091-33/+33
* sim: Add ChdrIfaceBfm testWade Fife2020-03-091-2/+3
* sim: Parameterize chdr_word_t data typeWade Fife2020-03-091-123/+150
* Merge FPGA repository back into UHD repositoryMartin Braun2020-01-281-0/+780